Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/255773
Kind Code:
A1
Abstract:
The present invention provides a semiconductor device and a method for manufacturing a semiconductor device that can prevent deterioration of a semiconductor chip and improve reliability. The present invention is provided with a first semiconductor chip (1) having a metal layer (1C) on a surface, a first wiring member (7) positioned in a manner opposing the metal layer (1C), sintered metal layers (4a, 4b) positioned between the metal layer (1C) and the first wiring member (7) and provided with a plurality of areas of high tensile strength and a plurality of areas of low tensile strength, and a metallic material (3) positioned inside the sintered metal layers (4a, 4b), the tensile strength in some of the areas of low tensile strength of the sintered metal layers (4a, 4b) being lower than the tensile strength of the metal layer (1C) of the first semiconductor chip (1).
Inventors:
HOKAZONO HIROAKI (JP)
KATO RYOICHI (JP)
KATO RYOICHI (JP)
Application Number:
PCT/JP2020/022499
Publication Date:
December 24, 2020
Filing Date:
June 08, 2020
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD (JP)
International Classes:
H01L23/48; H01L21/60; H01L21/603; H01L25/07; H01L25/18
Domestic Patent References:
| WO2017002793A1 | 2017-01-05 |
Foreign References:
| JP2011238779A | 2011-11-24 | |||
| JP2018026417A | 2018-02-15 | |||
| DE10349477A1 | 2005-02-24 | |||
| EP3416186A1 | 2018-12-19 | |||
| JP2006202586A | 2006-08-03 | |||
| JP2015216160A | 2015-12-03 | |||
| JP2006269682A | 2006-10-05 | |||
| JP2011192695A | 2011-09-29 | |||
| DE102017206925A1 | 2018-10-25 | |||
| JP2019212759A | 2019-12-12 |
Attorney, Agent or Firm:
HIROSE Hajime et al. (JP)
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