Background of the Invention Various metallic oxides exhibit desirable characteristics such as piezoelectric, ferroelectric, ferromagnetic, colossal magnetic resistance, and super conductivity properties. Such oxides may be included or used in connection with microelectronic devices that take advantage of these characteristics. For example, metallic oxides may be used to form ferroelectric memory devices and the like.

Generally, the desirable characteristics of the metallic oxide films increase as the crystallinity of the oxide film increases. For example, superconductive materials exhibit the highest conductivity when the material is in a monocrystalline form. Moreover, integration of such oxides with semiconductor components to form devices such as memory devices is also desirable.

Accordingly, methods and apparatus for growing thin-film, monocrystalline metallic oxides on semiconductor substrates are desired.

Because of the desirable characteristics of various metallic oxide materials, and because of their present generally high cost and low availability in bulk form, for many years attempts have been made to grow thin films of

the desired metallic oxide materials on a foreign substrate. To achieve optimal characteristics of metallic oxide material, however, a monocrystalline film of high crystalline quality is desired. Attempts have been made, for example, to grow layers of a monocrystalline metallic oxide material on substrates such as silicon. These attempts have generally been unsuccessful because lattice mismatches between the host crystal and the grown crystal have caused the resulting thin film of metallic oxide material to be of low crystalline quality. Metallic oxides of higher quality have been grown over oxide substrates such as bulk strontium titanate. Metallic oxides grown over oxide substrates are often expensive because, in part, the oxide substrate is small and expensive.

If a large area thin film of high quality monocrystalline metallic oxide material was available at low cost, a variety of semiconductor devices could advantageously be fabricated using that film at a low cost compared to the cost of fabricating such devices on a bulk wafer of the metallic oxide material or in an epitaxial film of such material on a bulk wafer of oxide material.

In addition, if a thin film of high quality monocrystalline metallic oxide material could be realized on a bulk wafer such as a silicon wafer, an integrated device structure could be achieved that took advantage of the best properties of both the silicon and the metallic oxide material.

Accordingly, a need exists for a microelectronic structure that provides a high quality monocrystalline metallic oxide film over another monocrystalline material and for a process for making such a structure.

Brief Description of the Drawings The present invention is illustrated by way of example and not limitation in the accompanying figures, in which like references indicate similar elements, and in which: FIGS. 1-3 illustrate schematically, in cross section, device structures in accordance with various embodiments of the invention; and FIG. 4 illustrates graphically the relationship between maximum attainable film thickness and lattice mismatch between a host crystal and a grown crystalline overlayer.

Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.

Detailed Description of the Drawings FIG. 1 illustrates schematically, in cross section, a portion of a microelectronic structure 20 in accordance with an embodiment of the invention. Microelectronic structure 20 includes a monocrystalline substrate 22, accommodating buffer layer 24 comprising a monocrystalline material, and a layer 26 of a monocrystalline metallic oxide material. In this context, the term "monocrystalline"shall have the meaning commonly used within the semiconductor industry. The term shall refer to materials that are a single crystal or that are substantially a single crystal and shall include those

materials having a relatively small number of defects such as dislocations and the like as are commonly found in substrates of silicon or germanium or mixtures of silicon and germanium and epitaxial layers of such materials commonly found in the semiconductor industry.

In accordance with one embodiment of the invention, structure 20 also includes an amorphous intermediate layer 28 positioned between substrate 22 and accommodating buffer layer 24. Structure 20 may also include a template layer 30 between the accommodating buffer layer and monocrystalline oxide layer 26. As will be explained more fully below, the template layer helps to initiate the growth of the metallic oxide layer on the accommodating buffer layer. The amorphous intermediate layer helps to relieve the strain in the accommodating buffer layer and, by doing so, aids in the growth of a high crystalline quality accommodating buffer layer.

Substrate 22, in accordance with an embodiment of the invention, is a monocrystalline semiconductor wafer, preferably of large diameter. The wafer can be of a material from Group IV of the periodic table, and preferably a material from Group IVA. Examples of Group IV semiconductor materials include silicon, germanium, mixed silicon and germanium, mixed silicon and carbon, mixed silicon, germanium and carbon, and the like.

Substrate 22 can also be of a compound semiconductor material. The compound semiconductor material of substrate 22 can be selected, as needed for a particular semiconductor structure, from any of the Group IIIA and VA elements (III-V semiconductor compounds), mixed III-V compounds, Group II (A or B) and VIA elements (II-VI semiconductor compounds), and mixed II-VI compounds.

Examples include gallium arsenide (GaAs), gallium indium arsenide (GaInAs), gallium aluminum arsenide (GaAlAs),

indium phosphide (InP), cadmium sulfide (CdS), cadmium mercury telluride (CdHgTe), zinc selenide (ZnSe), zinc sulfur selenide (ZnSSe), and the like.

Preferably, substrate 22 is a wafer containing silicon or germanium, and most preferably is a high quality monocrystalline silicon wafer as used in the semiconductor industry. Accommodating buffer layer 24 is preferably a monocrystalline oxide or nitride material epitaxially grown on the underlying substrate. In accordance with one embodiment of the invention, amorphous intermediate layer 28 is grown on substrate 22 at the interface between substrate 22 and the growing accommodating buffer layer by the oxidation of substrate 22 during the growth of layer 24. The amorphous intermediate layer serves to relieve strain that might otherwise occur in the monocrystalline accommodating buffer layer as a result of differences in the lattice constants of the substrate and the buffer layer. As used herein, lattice constant refers to the distance between atoms of a cell measured in the plane of the surface. If such strain is not relieved by the amorphous intermediate layer, the strain may cause defects in the crystalline structure of the accommodating buffer layer. Defects in the crystalline structure of the accommodating buffer layer, in turn, would make it difficult to achieve a high quality crystalline structure in monocrystalline metallic oxide layer 26.

Accommodating buffer layer 24 is preferably a monocrystalline oxide or nitride material selected for its crystalline compatibility with the underlying substrate and with the overlying metallic oxide material. For example, the material could be an oxide or nitride having a lattice structure matched to the substrate and to the subsequently applied metallic oxide material. Materials

that are suitable for the accommodating buffer layer include metal oxides such as the alkaline earth metal titanates, alkaline earth metal zirconates, alkaline earth metal hafnates, alkaline earth metal tantalates, alkaline earth metal ruthenates, alkaline earth metal niobates, alkaline earth metal vanadates, perovskite oxides such as alkaline earth metal tin-based perovskites, lanthanum aluminate, lanthanum scandium oxide, and gadolinium oxide.

Additionally, various nitrides such as gallium nitride, aluminum nitride, and boron nitride may also be used for the accommodating buffer layer. Most of these materials are insulators, although strontium ruthenate, for example, is a conductor. Generally, these materials are metal oxides or metal nitrides, and more particularly, these metal oxide or nitrides typically include at least two different metallic elements. In some specific applications, the metal oxides or nitride may include three or more different metallic elements.

Amorphous interface layer 28 is preferably an oxide formed by the oxidation of the surface of substrate 22, and more preferably is composed of a silicon oxide. The thickness of layer 28 is sufficient to relieve strain attributed to mismatches between the lattice constants of substrate 22 and accommodating buffer layer 24.

Typically, layer 28 has a thickness in the range of approximately 0.5-5 nm.

The metallic oxide material of layer 26 can be selected, as desired for a particular structure or application. For example, layer 26 can include a metallic oxide material having a desired property such as a material which exhibits piezoelectric, pyroelectric, ferromagnetic, colossal magneto resistive, or super conductive characteristics. Such materials include monoclinic, tetragonal, cubic, or perovskite metallic

oxide structures with the a general chemical formula ABO3 where A is selected from the group consisting of lead, lanthanum, niobium, scandium, and combinations thereof, and B is selected from the group consisting of zirconium, titanium, and combinations thereof: (Pb, La, Na, Sc) (Zr, Ti) O3,T e. g., PbZrTiO3MT PbNbZrTiO3T PbScZrTiO3, PbSrNbZrTiO3, PbLiZrTiO3, PbTiO3 ; AB03 where A is selected from the group consisting of strontium, barium, calcium, and combinations thereof and B is selected from the group consisting of zirconium, hafnium, titanium, and combinations thereof: (Sr, Ba, Ca) (Zr, Hf, Ti) 03, e. g., SrTiO3, BaTiO3, BaSrTiO3, CaTiO3t BaZrO3; ACoO3 where A is selected from the group consisting of lanthanum, strontium, barium, zirconium, and combinations thereof: (La, Sr, Ba, Zr) CoO3, e. g., LaSrCoO3, LaZrCoO3 ; ABBMnO3 where A is a rare earth element (e. g., lanthanum) and B is an alkali earth metal element (e. g., calcium, barium, or strontium): (La, Sr, Ba, Ca) MnO3, e. g., LaSrMnO3, LaCaMnO3 ; ABa2Cu3On where A is selected from the group consisting of yttrium, praseodymium, and combinations thereof and n is 7 or 8: (Y, Pr) Ba2Cu3O7-8, e. g., YBa2Cu3O, YPrBa2Cu30 ; ARu03 where A is selected from the group consisting of strontium, barium, and combinations thereof: (Sr, Ba) RuO3 ; PbAO3 where A is selected from the group consisting of magnesium, niobium, and combinations thereof : Pb (Mg, Nb) 03 ; GdFeO3 ; YA103 ; LaAl03 ; SrV03 ; SrCrO3 ; BaA03 where A is selected from the group consisting of lead, bismuth, and combinations thereof: Ba (Pb, Bi) 03 ; LaCoO3, ; KNbO3 ; NaWO3 ; Bi4Ti3O12; YMnO3 ; and LaAO3 where A is selected from the group consisting of aluminum, scandium, and combinations thereof: La (Al, Sc) O3.

Suitable template materials chemically bond to the surface of the accommodating buffer layer 24 at selected sites and provide sites for the nucleation of the

epitaxial growth of the subsequent metallic oxide layer 26. When used, template layer 30 has a thickness ranging from about one to about ten monolayers.

FIG. 2 illustrates, in cross section, a portion of a microelectronic structure 40 in accordance with a further embodiment of the invention. Structure 40 is similar to the previously described structure 20, except that an additional buffer layer 32 is positioned between accommodating buffer layer 24 and layer of monocrystalline metallic oxide material 26. Specifically, the additional buffer layer is positioned between optional template layer 30 (or layer 24 if no template layer exists) and the overlying layer of moncrystalline metallic oxide material.

The additional buffer layer, formed of a monocrystalline oxide material, serves to provide a lattice compensation when the lattice constant of the accommodating buffer layer cannot be adequately matched to the overlying metallic oxide material layer.

FIG. 3 schematically'illustrates, in cross section, a portion of a microelectronic structure 34 in accordance with another exemplary embodiment of the invention.

Structure 34 is similar to structure 20, except that structure 34 includes an amorphous layer 36, rather than accommodating buffer layer 24 and amorphous interface layer 28, and an additional metallic oxide layer 38.

As explained in greater detail below, amorphous layer 36 may be formed by first forming an accommodating buffer layer and an amorphous interface layer in a similar manner to that described above. Monocrystalline metallic oxide layer 38 is then formed (by epitaxial growth) overlying the monocrystalline accommodating buffer layer. The accommodating buffer layer is then exposed to an anneal process to convert the monocrystalline accommodating buffer layer to an amorphous layer. Amorphous layer 36

formed in this manner comprises materials from both the accommodating buffer and interface layers, which amorphous layers may or may not amalgamate. Thus, layer 36 may comprise one or two amorphous layers. Formation of amorphous layer 36 between substrate 22 and metallic oxide layer 38 (subsequent to layer 38 formation) relieves stresses between layers 22 and 38 and provides a true compliant substrate for subsequent processing--e. g., metallic oxide layer 26 formation.

The processes previously described above in connection with FIGS. 1 and 2 are adequate for growing monocrystalline metallic oxide layers over a monocrystalline substrate. However, the process described in connection with FIG. 3, which includes transforming a monocrystalline accommodating buffer layer to an amorphous oxide layer, may be better for growing monocrystalline metallic oxide layers because it allows any strain in layer 38 to relax prior to forming layer 26.

Metallic oxide layer 38 may include any of the materials described throughout this application in connection with either of metallic oxide layer 26 or additional buffer layer 32. For example, layer 38 may include the perovskite metallic oxides listed above as materials suitable for layer 26.

In accordance with one embodiment of the present invention, layer 38 serves as an anneal cap during layer 36 formation and as a template for subsequent metallic oxide layer 26 formation. Accordingly, layer 38 is preferably thick enough to provide a suitable template for layer 26 growth (at least one monolayer) and thin enough to allow layer 38 to form as a substantially defect free monocrystalline metallic oxide (often less than about ten monolayers).

In accordance with another embodiment of the invention, monocrystalline metallic oxide layer 38 comprises a metallic oxide material (e. g., a material discussed above in connection with layer 26) that is thick enough to use a film for a desired microelectronic device.

In this case, a microelectronic structure in accordance with the present invention does not include layer 26. In other words, the microelectronic structure in accordance with this embodiment only includes one metallic oxide layer disposed above amorphous oxide layer 36.

The following non-limiting, illustrative examples illustrate various combinations of materials useful in structures 20,40, and 34 in accordance with various alternative embodiments of the invention. These examples are merely illustrative, and it is not intended that the invention be limited to these illustrative examples.

Example 1 In accordance with one embodiment of the invention, monocrystalline substrate 22 is a silicon substrate oriented in the (100) direction. The silicon substrate can be, for example, a silicon substrate as is commonly used in making complementary metal oxide semiconductor (CMOS) integrated circuits having a diameter of about 200- 300 mm. In accordance with this embodiment of the invention, accommodating buffer layer 24 is a monocrystalline layer of SrzBaSzTiO3 where z ranges from 0 to 1 and the amorphous intermediate layer is a layer of silicon oxide (SiOx) formed at the interface between the silicon substrate and the accommodating buffer layer. The value of z is selected to obtain one or more lattice constants closely matched to corresponding lattice constants of the subsequently formed layer 26. The accommodating buffer layer can have a thickness of about 2 to about 100 nanometers (nm) and preferably has a thickness of about 10 nm. In general, it is desired to have an accommodating buffer layer thick enough to isolate the metallic oxide layer from the substrate to obtain the desired properties. Layers thicker than 100 nm usually provide little additional benefit while increasing cost unnecessarily ; however, thicker layers may be fabricated if needed. The amorphous intermediate layer of silicon oxide can have a thickness of about 0.5-5 nm, and preferably a thickness of about 1.5-2.5 nm.

In accordance with this embodiment of the invention, metallic oxide material layer 26 is a layer of strontium ruthenate (SrRuO3) having a thickness of about 5 to about 500 nm and preferably a thickness of about 10 to about 100 nm. The thickness generally depends on the application for which the layer is being prepared.

Example 2 In accordance with another embodiment of the invention, a structure is provided that is suitable for the growth of an epitaxial film of (Pb, La, Nb, Sc) (Zr, Ti) 03 film overlying a silicon substrate. The substrate is preferably a silicon wafer as described above. A suitable accommodating buffer layer material is SrxBalxTiO3, where x ranges from 0 to 1, having a thickness of about 2-100 nm and preferably a thickness of about 5-15 nm. The metallic oxide material can be, for example PbZrTiO3, having a thickness of about 50 nm to about 500 nm.

Referring again to FIGS. 1-3, substrate 22 is a monocrystalline substrate such as a monocrystalline silicon or gallium arsenide substrate. The crystalline structure of the monocrystalline substrate is characterized by a lattice constant and by a lattice orientation. In similar manner, accommodating buffer layer 24 is also a monocrystalline material and the lattice of that monocrystalline material is characterized by a lattice constant and a crystal orientation. The lattice constants of the accommodating buffer layer and the monocrystalline substrate must be closely matched or, alternatively, must be such that upon rotation of one crystal orientation with respect to the other crystal orientation, a substantial match in lattice constants is achieved. In this context the terms"substantially equal" and"substantially matched"mean that there is sufficient similarity between the lattice constants to permit the growth of a high quality crystalline layer on the underlying layer.

FIG. 4 graphically illustrates the relationship of the achievable thickness of a grown crystal layer of high

crystalline quality as a function of the mismatch between the lattice constants of the host crystal and the grown crystal. Curve 42 illustrates the boundary of high crystalline quality material. The area to the right of curve 42 represents layers that tend to be polycrystalline. With no lattice mismatch, it is theoretically possible to grow an infinitely thick, high quality epitaxial layer on the host crystal. As the mismatch in lattice constants increases, the thickness of achievable, high quality crystalline layer decreases rapidly. As a reference point, for example, if the lattice constants between the host crystal and the grown layer are mismatched by more than about 2%, monocrystalline epitaxial layers in excess of about 20 nm cannot be achieved.

In accordance with one embodiment of the invention, substrate 22 is a (100) or (111) oriented monocrystalline silicon wafer and accommodating buffer layer 24 is a layer of strontium barium titanate. Substantial matching of lattice constants between these two materials is achieved by rotating the crystal orientation of the titanate material by 45° with respect to the crystal orientation of the silicon substrate wafer. The inclusion in the structure of amorphous interface layer 28, a silicon oxide layer in this example, if it is of sufficient thickness, serves to reduce strain in the titanate monocrystalline layer that might result from any mismatch in the lattice constants of the host silicon wafer and the grown titanate layer. As a result, in accordance with an embodiment of the invention, a high quality, thick, monocrystalline titanate layer is achievable.

Still referring to FIGS. 1-3, layer 26 is a layer of epitaxially grown metallic oxide material and that

crystalline material is also characterized by a crystal lattice constant and a crystal orientation. In accordance with one embodiment of the invention, the lattice constant of layer 26 differs from the lattice constant of substrate 22. To achieve high crystalline quality in this epitaxially grown monocrystalline layer, the accommodating buffer layer must be of high crystalline quality. In addition, in order to achieve high crystalline quality in layer 26, substantial matching between the crystal lattice constant of the host crystal, in this case, the monocrystalline accommodating buffer layer, and the grown crystal is desired. With properly selected materials, this substantial matching of lattice constants is achieved as a result of rotation of the crystal orientation of the grown crystal with respect to the orientation of the host crystal. In some instances, a crystalline buffer layer between the host oxide and the grown metallic oxide layer can be used to reduce strain in the grown monocrystalline metallic oxide layer that might result from small differences in lattice constants. Better crystalline quality in the grown monocrystalline metallic oxide layer can thereby be achieved.

The following example illustrates a process, in accordance with one embodiment of the invention, for fabricating a microelectronic structure such as the structures depicted in FIGS. 1-3. The process starts by providing a monocrystalline semiconductor substrate comprising silicon or germanium. In accordance with a preferred embodiment of the invention, the semiconductor substrate is a silicon wafer having a (100) orientation.

The substrate is preferably oriented on axis or, at most, about 0.5° off axis. At least a portion of the semiconductor substrate has a bare surface, although other

portions of the substrate, as described below, may encompass other structures. The term"bare"in this context means that the surface in the portion of the substrate has been cleaned to remove any oxides, contaminants, or other foreign material. As is well known, bare silicon is highly reactive and readily forms a native oxide. The term"bare"is intended to encompass such a native oxide. A thin silicon oxide may also be intentionally grown on the semiconductor substrate, although such a grown oxide is not essential to the process in accordance with the invention. In order to epitaxially grow a monocrystalline oxide layer overlying the monocrystalline substrate, the native oxide layer must first be removed to expose the crystalline structure of the underlying substrate. The following process is preferably carried out by molecular beam epitaxy (MBE), although other epitaxial processes may also be used in accordance with the present invention. The native oxide can be removed by first thermally depositing a thin layer of strontium, barium, a combination of strontium and barium, or other alkali earth metals or combinations of alkali earth metals in an MBE apparatus. In the case where strontium is used, the substrate is then heated to a temperature of about 750° C to cause the strontium to react with the native silicon oxide layer. The strontium serves to reduce the silicon oxide to leave a silicon oxide-free surface. The resultant surface, which exhibits an ordered 2x1 structure, includes strontium, oxygen, and silicon.

The ordered 2x1 structure forms a template for the ordered growth of an overlying layer of a monocrystalline oxide.

The template provides the necessary chemical and physical properties to nucleate the crystalline growth of an overlying layer.

In accordance with an alternate embodiment of the invention, the native silicon oxide can be converted and the substrate surface can be prepared for the growth of a monocrystalline oxide layer by depositing an alkali earth metal oxide, such as strontium oxide, strontium barium oxide, or barium oxide, onto the substrate surface by MBE at a low temperature and by subsequently heating the structure to a temperature of about 750°C. At this temperature, a solid state reaction takes place between the strontium oxide and the native silicon oxide, causing the reduction of the native silicon oxide and leaving an ordered 2xl structure with strontium, oxygen, and silicon remaining on the substrate surface. Again, this forms a template for the subsequent growth of an ordered monocrystalline oxide layer.

Following the removal of the silicon oxide from the surface of the substrate, in accordance with one embodiment of the invention, the substrate is cooled to a temperature in the range of about 200-800°C and a layer of strontium titanate is grown on the template layer by molecular beam epitaxy. The MBE process is initiated by opening shutters in the MBE apparatus to expose strontium, titanium and oxygen sources. The ratio of strontium and titanium is approximately 1: 1. The partial pressure of oxygen is initially set at a minimum value to grow stochiometric strontium titanate at a growth rate of about 0.3-0.5 nm per minute. After initiating growth of the strontium titanate, the partial pressure of oxygen is increased above the initial minimum value. The overpressure of oxygen causes the growth of an amorphous silicon oxide layer at the interface between the underlying substrate and the growing strontium titanate layer. The growth of the silicon oxide layer results from

the diffusion of oxygen through the growing strontium titanate layer to the interface where the oxygen reacts with silicon at the surface of the underlying substrate.

The strontium titanate grows as an ordered monocrystal with the crystalline orientation rotated by 45° with respect to the ordered 2x1 crystalline structure of the underlying substrate. Strain that otherwise might exist in the strontium titanate layer because of the small mismatch in lattice constant between the silicon substrate and the growing crystal is relieved in the amorphous silicon oxide intermediate layer.

After the strontium titanate layer has been grown to the desired thickness, the monocrystalline strontium titanate may be capped by a template layer that is conducive to the subsequent growth of an epitaxial layer of a desired metallic oxide material. For example, the MBE growth of the strontium titanate monocrystalline layer can be capped by terminating the growth with 1-2 monolayers of titanium, 1-2 monolayers of titanium-oxygen or with 1-2 monolayers of strontium-oxygen. Following the formation of the template (if one is formed), the metallic oxide material is grown using MBE or other suitable techniques.

The structure illustrated in FIG. 2 can be formed by the process discussed above with the addition of an additional buffer layer deposition step. The buffer layer is formed overlying the template or accommodating buffer layer before the deposition of the monocrystalline metallic oxide layer. If the buffer layer is an oxide superlattice, such a superlattice can be deposited, by MBE for example, on the template described above.

Structure 34, illustrated in FIG. 3, may be formed by growing an accommodating buffer layer, forming an

amorphous oxide layer over substrate 22, and growing metallic oxide layer 38 over the accommodating buffer layer, as described above. The accommodating buffer layer and the amorphous oxide layer are then exposed to an anneal process sufficient to change the crystalline structure of the accommodating buffer layer from monocrystalline to amorphous, thereby forming an amorphous layer such that the combination of the amorphous oxide layer and the now amorphous accommodating buffer layer form a single amorphous oxide layer 36. Layer 26 is then subsequently grown over layer 38. Alternatively, the anneal process may be carried out subsequent to growth of layer 26.

In accordance with one aspect of this embodiment, layer 36 is formed by exposing substrate 22, the accommodating buffer layer, the amorphous oxide layer, and layer 38 to a rapid thermal anneal process with a peak temperature of about 700°C to about 1000°C and a process time of about 10 seconds to about 10 minutes. However, other suitable anneal processes may be employed to convert the accommodating buffer layer to an amorphous layer in accordance with the present invention. For example, laser annealing or"conventional"thermal annealing processes (in the proper environment) may be used to form layer 36.

When conventional thermal annealing is employed to form layer 36, an overpressure of one or more constituents of layer 30 may be required to prevent degradation of layer 38 during the anneal process.

As noted above, layer 38 of structure 34 may include any materials suitable for either of layers 32 or 26.

Accordingly, any deposition or growth methods described in connection with either layer 32 or 26 may be employed to deposit layer 38.

The process described above illustrates a process for forming a semiconductor structure including a silicon substrate, an overlying oxide layer, and a monocrystalline metallic oxide layer by the process of molecular beam epitaxy. The process can also be carried out by the process of chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), migration enhanced epitaxy (MEE), atomic layer epitaxy (ALE), physical vapor deposition (PVD), chemical solution deposition (CSD), pulsed laser deposition (PLD), or the like. Further, by a similar process, other monocrystalline accommodating buffer layers such as alkaline earth metal titanates, zirconates, hafnates, tantalates, vanadates, ruthenates, and niobates, peroskite oxides such as alkaline earth metal tin-based perovskites, lanthanum aluminate, lanthanum scandium oxide, and gadolinium oxide can also be grown. Further, by a similar process such as MBE, other metallic oxide layers can be deposited overlying the monocrystalline oxide accommodating buffer layer. For example, the metallic oxide may be grown via PLD, by ablating a target of the desired material with an eximer laser and heating the substrate to a temperature of about 300 °C to about 500 °C Each of the variations of metallic oxide materials and monocrystalline oxide accommodating buffer layer may use an appropriate template for initiating the growth of the respective layer. In such a case, suitable template materials may be grown according to the methods described above in connection with growing layer 26.

In the foregoing specification, the invention has been described with reference to specific embodiments.

However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set

forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention.

Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element (s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential features or elements of any or all the claims. As used herein, the terms"comprises," "comprising,"or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.