| Document |
Document Title |
|
JP3876963B2 |
To provide a bit array conversion method which can simultaneously process plural data in a small number of processing steps. A system 100 that carries out this bit array conversion method includes the 1st and 2nd registers 21 and 22 whic...
|
|
JP2007501428A |
The buffer management system ( 100 ) is arranged to control in a data communication system an end to end delay (Delta) of a data unit ( 150 ) from input to output. Blocks ( 104, 106 ) of data units ( 150, 152 ) are written in a buffer ( ...
|
|
JP3871424B2 |
To control data input and output to/from buffer memory with buffer memory of a small capacity and a small hardware scale even when the relation of input-output data numbers to the buffer memory is not periodical. A write counter 4 counts...
|
|
JP3868047B2 |
To read/write a data correctly using small memory capacity by multiplexing/demultiplexing a predetermined pattern signal on/from a parity signal synchronized with a block head signal in the form of parity error thereby eliminating the ne...
|
|
JP3869992B2 |
To execute a compression processing at high speed without deteriorating compression efficiency by executing block compression in a block, where block compression is effective and executing a processing except block compression in the sub...
|
|
JP3869033B2 |
To appropriately expand an adjusted monotone compressed file having a first section containing compressed code words and a second section containing a plain text into an expanded file having a certain size and containing the plain text. ...
|
|
JP2007004795A |
To provide a system performing memory controller base compression (expansion).The system comprises a memory controller (110) and a RAM controller (120). The memory controller compresses a non-compressed data block, calculates the size of...
|
|
JP3867494B2 |
To easily realize transmission of high-speed serial data based on an STM, etc. In a data processor 1, a transmission data detecting part 10 detects the position where transmission object data in parallel data exists when STM-64 serial da...
|
|
JP3866770B2 |
A method and an apparatus for writing display data to and reading display data from a FIFO. In one embodiment of the present invention, a memory controller coupled to a memory is configured to retrieve display data from the memory and wr...
|
|
JP3863314B2 |
To obtain a program execution device which automatically performs endian conversion corresponding to each I/O (an interface part, a storage circuit, or the like) connected to a processor even in the case of the absence of an explicit end...
|
|
JP3860574B2 |
An apparatus and method for extracting and loading data to/from a buffer are described. The method includes the selection of data from a data buffer in response to execution of a data access instruction. The data buffer includes a plural...
|
|
JP3857576B2 |
To provide an environment for carrying out an efficient analysis by commonly using a data form of input-output data of an analytical engine. While data of a data form input data file 1 composed of a data part and a defining part for defi...
|
|
JP3854028B2 |
To realize a skew elimination system which can be operated with a high precision in a wider input value range and a wider temperature range and is simple and robust with respect to a system where automatic skew eliminating tuning and arr...
|
|
JP3850065B2 |
To safely and efficiently write, read data and reduce a circuit scale. As shown in (a), this device is provided with a first counter 2 for counting write data and a second counter 3 for counting read data. A transfer end signal is output...
|
|
JP2006320000A |
To accomplish a simpler and more robust deskew system capable of operating over a wider range of input values with greater accuracy and over a broader range of temperatures regarding a system which performs automatic deskew tuning and al...
|
|
JP2006314117A |
To obtain a simpler and more robust deskew system capable of operating over a wider range input values with greater accuracy and over a broader range of temperature regarding a system for performing automatic deskew tuning and alignment ...
|
|
JP3841572B2 |
To provide a data processor capable of using a conditional inverting function in relation with a precharge type circuit. This device is provided with a precharge type circuit 200 having an input line 320 arranged so as to be precharged a...
|
|
JP2006523884A |
A processing circuit executes a data producing process and a data consuming process. The data producing process produces a stream of data, the data consuming process consumes the stream of data concurrently with production of the stream....
|
|
JP3835489B2 |
To shorten processing time by accelerating the retrieval and registration of a dictionary. A hash value is generated by internal hash from a plurality of input characters and an index for indicating a character string already retrieved a...
|
|
JP3832932B2 |
To reduce the skew of even a specific circuit which receives a signal outputted from the semiconductor integrated circuit not only by reducing the skew of the signal inputted from the specific circuit, but also by making use of skew info...
|
|
JP3831716B2 |
To provide a method and a device for uncompressing three or more bytes per one processor cycle from a stream of the compressed data by using a processing pipeline. The compressed data is represented by a token of a variable and unknown l...
|
|
JP3828216B2 |
To improve the security, by making access data changeable corresponding to the place of mobile computer. When this system is to access data stored in a data base 13 managed by a data base server 11 in a computer environment composed of a...
|
|
JP2006262462A |
To provide a method and system for compressing input data stream, using an LZ77-based mechanism.An input stream is compressed into an encode stream by using the LZ77-based mechanism. A sequence of literal (bytes that do not form a portio...
|
|
JP2006260375A |
To solve a problem wherein a storage device for storing a huge code table is required when converting codes of Chinese characters from a specific coded character collection including Chinese characters to a different coded character coll...
|
|
JP3823929B2 |
To distribute proper contents according to specifications of a client apparatus without preparing any contents in a plurality of format types. On receipt of a data list request from a client, a server sets conversion identification infor...
|
|
JP3822685B2 |
To safely hold the data stored in an FIFO device by preventing the data of a pipe line from transmitting when the number of empty registers of the FIFO device are less than the data processors of the pipe line. The FIFO device 61 is cons...
|
|
JP2006243897A |
To solve the problem in high-speed serial transfer using physical delay that a delay value is shifted from a bus master to a bus slave by process dispersion or influence of temperature characteristic.A plurality of selectors 4a-4e are se...
|
|
JP2006227866A |
To surely set a delay time from a bus mater to a bus slave with consistency to achieve a serial transfer using the physical delay of a selector as a result.A serial data transfer device and a serial clock transfer device are configured w...
|
|
JP3815482B2 |
To provide a data transfer control apparatus capable of realizing power saving in an idling time, and electronic equipment. The data transfer control apparatus comprises an encode circuit 54 for encoding data and generating special codes...
|
|
JP3814470B2 |
To provide a decision method for a data transfer rate that can surely decide information of a transfer rate independently of an operating environment with a small circuit scale. A pointer comparator 34 provided to an FIFO circuit section...
|
|
JP3815107B2 |
To provide a ciphered file generating and reading method capable of easily managing a ciphered document and a key necessary for ciphering the document. This data file generating method to be utilized for plural readers A to C having resp...
|
|
JP3815948B2 |
To obtain a FIFO memory control circuit in which disappearance of data caused by overwriting of data and double reading of the same data can be prevented by counting correctly the number of effective data in a memory when a period of a r...
|
|
JP3810449B2 |
PURPOSE: To perform data output to a queue without making a device writing data to the queue wait until 'a vacancy' is generated in the queue even in the case the queue is filled to capacity in a queue device. CONSTITUTION: When an overf...
|
|
JP3809195B2 |
PURPOSE: To improve the accuracy of preview by inputting information representing resolution or the number of gradations of an image reproduction device and applying preview to a reproduced image according to the information. CONSTITUTIO...
|
|
JP2006203756A |
To provide a data processor, a data processing system and a data processing method with high effect of reduction of power consumption in the whole system.A register file part 31 outputs register file signals DX1, DXb in data restoration ...
|
|
JP3803246B2 |
To constitute a receiving FIFO(First In First Out) incorporated in start-stop synchronizing serial communication equipment holding interchangeability with a PC 16550D being an industry standard, using a general use memory- macro. A well ...
|
|
JP3800934B2 |
To provide a memory access device that solves speed buffering problems of a high cost to use a two port memory and the infeasibility of a high-speed access caused by using a one port memory that requires a selective circuit to discrimina...
|
|
JP3798757B2 |
To make digital audio processing possible by receiving broadcast signals and converting the signals into data streams. Signals from a station selected by a user are converted into digital data streams and inputted to a first-in first-out...
|
|
JP2006186604A |
To provide a compressed data structure which can be processed at a high speed and has a higher compression rate.When direct data 22 and the other part of the inputted data are coincident with each other or a prepared fixed dictionary and...
|
|
JP3796386B2 |
To provide a method and a device by which additional information items can be quickly inserted to compressed digital data in a way more solid than the conventional technology. When additional information items are inserted to one set of ...
|
|
JP3790158B2 |
To provide a FIFO (first-in first-out) circuit of which the circuit area is reduced. The input side input pointer of a memory 2 is designated synchronously to an input clock, the output side input pointer of the memory 2 is designated by...
|
|
JP3790697B2 |
To provide a FIFO memory, a control system for the FIFO memory, a semiconductor unit, and an information processing unit, without deteriorating a system performance due to frequent interruption to a CPU. This memory unit includes a rate ...
|
|
JP3786120B2 |
To provide a data transfer controller capable of generating efficient interface signals and an electronic device including the controller. The data transfer controller 30 includes a link controller 100 analyzing a packet received from th...
|
|
JP3786121B2 |
To provide a data transfer controller capable of reproducing a synchronous signal by simple processing and an electronic device including the controller. The data transfer controller 30 includes a link controller 100 analyzing a packet r...
|
|
JP3775487B2 |
To provide a generally usable digital waveform data recording circuit for LSI incorporation preventing the increase of a memory capacity, and a recording method. The digital waveform data recording circuit is at least provided with a dat...
|
|
JP3776295B2 |
To provide a serial access memory having a function possessed by an access memory of the conventional FIFO type and a function possessed by possessed by a serial access memory of a line access type in combination and a data write/read me...
|
|
JP3775983B2 |
To provide a method of processing a buffer underrun when files are being recorded in an optical disk. When files are being recorded, tracks for recording file system for recording files in an optical disk are reserved, and then the files...
|
|
JP2006120100A |
To provide a database server and an information system permitting efficient conversion processing of data and improvement of maintainability as the entire system.The database server 2 acquires master data accumulated in a backbone system...
|
|
JP3772639B2 |
To suppress the frequency of initial setting by simplifying a circuit for detecting the difference between a read-out address and a write-in address and reducing a circuit scale and by detecting previously a state in which the read-out a...
|
|
JP3774072B2 |
To provide a compute data compression controller which can realize an efficient operation by way of load distribution of compression/restoration processings. A computer data compression controller is provided for a data preservation serv...
|
