| Document |
Document Title |
|
WO/2024/065568A1 |
A method for filtering a deviation signal of a Hall position sensor for a robot joint. The method comprises: acquiring a duration of each Hall state during the operation of an electric motor (S10); calculating the current Hall average du...
|
|
WO/2024/063120A1 |
This digital filter circuit comprises: a short-term storage means that takes in stream data as a digital signal, cyclically activates a first phase and a second phase, and stores a local state variable; and a long-term storage means that...
|
|
WO/2024/063927A1 |
Methods and devices to reduce glitches in phase shifters implementing high isolation switches are disclosed. Such glitches occur at the output of the phase shifters when transitioning from one phase shift to another. The disclosed method...
|
|
WO/2024/039775A1 |
In an example, a circuit (200) includes a first signal path (212) including a first filter (202A) having a first number of taps and having an input and an output. The circuit (200) also includes a combiner (208) having first and second i...
|
|
WO/2024/028966A1 |
This signal processing device (1) comprises: a signal acquisition unit (11) which acquires an input signal; a signal extraction unit (12) which extracts a specific signal by multiplying the input signal by a window function; a frequency ...
|
|
WO/2023/223385A1 |
This signal processing device comprises: a control unit that divides buffer data into a plurality of pieces of divided buffer data; a plurality of filter coefficient updating units that execute, in parallel on the plurality of pieces of ...
|
|
WO/2023/214020A1 |
The invention relates to a device for reducing noise during the reproduction of an audio signal using a headphone (10) or hearing aid. At least one sensor (20, 22, 23) is provided for detecting a sensor signal based on ambient sound and/...
|
|
WO/2023/193467A1 |
The embodiments of the present application relate to a filtering module, a signal processing circuit and method, and an electronic device. The filtering module (11) comprises: one filtering channel (20) or at least two filtering channels...
|
|
WO/2023/162143A1 |
The present invention can compensate for various types of distortion while suppressing an increase of the calculation amount. A first filter (23) performs compensation for first distortion included in reception signals which have been co...
|
|
WO/2023/150868A1 |
In an aspect herein, the disclosure provides a method for implementing a wideband electronically tunable filter, comprising: receiving an RF input at a first frequency within a first RF band; up-converting the RF input based on mixing th...
|
|
WO/2023/148540A1 |
The present invention discloses a method for designing the transfer function of efficient recursive FIR digital filters. The method is based on the cancellation of the poles of the transfer function of a multi-resonator sub-filter by zer...
|
|
WO/2023/144618A1 |
A transmit in-phase quadrature (IQ) amplifier includes a common gain stage to receive an input signal and to generate an amplified signal. The amplifier includes an IQ poly-phase filter coupled to the common gain stage to receive the amp...
|
|
WO/2023/135996A1 |
When M/N (M and N being integers greater than or equal to 1) is set as a conversion rate, a sampling rate converter (12) converts input sampling data sampled at an input sampling rate to output sampling data sampled at an output sampling...
|
|
WO/2023/127225A1 |
Provided are a filter designing method by which components can be reduced, and an IIR type all-pass filter. 　Provided is a filter designing method for a computer to design an IIR type all-pass filter including N (where N is an integer ...
|
|
WO/2023/129397A1 |
Utilizing a fast Fourier transform (FFT) to cancel a non-liner phase response of a digital infinite impulse response (HR) lowpass filter is presented herein. An apparatus generates, via the digital HR lowpass filter, respective discrete ...
|
|
WO/2023/108632A1 |
An IIR filter assembly, an audio device, and a coefficient switching method. When a filter coefficient used for filtering an input signal needs to be adjusted, the weight of filter coefficients of two sets of filter resources are adjuste...
|
|
WO/2023/110891A1 |
The invention relates to a method for generating, by means of an electrical device based on an input signal, an output signal that exhibits a negative group delay. Said method comprises the following steps, carried out by a programmable ...
|
|
WO/2023/105194A1 |
A filter system for filtering an input signal comprises a network of Prism filters including at least one cosine Prism filter and at least one sine Prism filter. The network comprises a first branch (210) in parallel with a second branch...
|
|
WO/2023/105183A1 |
A method of estimating characteristics of an input signal comprises inputting the input signal into a first tracker to determine a first estimate of characteristics of the input signal, and determining a normalised signal from the input ...
|
|
WO/2023/099488A1 |
The present document describes a method (200) for determining N coefficients of an asymmetric prototype filter p 0 for use in a low delay M-channel analysis and/or synthesis filter bank (101, 102) comprising M analysis filters h k (103) ...
|
|
WO/2023/065863A1 |
A receiving device, a radio frequency system and a communication device. The receiving device comprises: a filtering assembly, and a receiving and amplification assembly. The filtering assembly comprises: an input port, which is configur...
|
|
WO/2023/050729A1 |
The present application discloses a digital filter, a filtering method and an electronic device. The digital filter comprises a data filtering module. The data filtering module comprises: a processing unit, which is used for correcting n...
|
|
WO/2023/044847A1 |
The present disclosure relates to the technical field of communications, and provides a phase shifter and a method for using same, and an antenna system. The present disclosure provides a phase shifter, comprising: a control module, a di...
|
|
WO/2023/032472A1 |
The present invention provides a signal-processing system comprising: an adaptive decimation filter device having a decimation filter that outputs an output signal obtained by down-sampling an input signal, and a filter control unit that...
|
|
WO/2023/032471A1 |
Provided is a signal processing system comprising: an adaptive decimation filter device having a decimation filter for outputting an output signal obtained by downsampling an input signal, and a reflected noise detection unit for detecti...
|
|
WO/2023/032470A1 |
Provided is an adaptive filter device comprising a decimation filter that outputs an output signal obtained by down-sampling an input signal, and a filter control unit that adjusts the order of the decimation filter on the basis of a cha...
|
|
WO/2023/012126A1 |
The invention relates to a method for converting data, involving at least the following steps: a number of asynchronously incoming data packets (P0, P1,..., P4) are received, said data packets (DP) comprising pieces of input data (ED) wi...
|
|
WO/2023/276136A1 |
In order to perform subcarrier separation without adding a dedicated storage unit, provided is a filter processing device comprising: an address control unit that specifies, on the basis of the offset amount of a light source frequency a...
|
|
WO/2023/273095A1 |
The present application applies to the technical field of digital signal processing and relates in particular to a filter and a design method therefor, the method comprising: acquiring a first filter and performing zero point calculation...
|
|
WO/2023/273363A1 |
The present invention relates to a clock frequency offset tracking method based on weighted observation fusion and timestamp-free interaction, which method belongs to the technical field of wireless sensor networks. The method comprises:...
|
|
WO/2022/262780A1 |
A self-adaptive generalized accumulation and GPS spoofing attack detection method, comprising the following steps: performing initialization (S1); using a self-adaptive sliding window to collect the measurement data zm,t of each phasor m...
|
|
WO/2022/246549A1 |
A signal processing circuit has a first signal loop with a first signal processing block and a first feedback path that extends around the first signal processing block, the first signal processing block having a frequency dependence tha...
|
|
WO/2022/245531A1 |
A Finite Impulse Response (FIR) filter that reduces the complexity of the hardware required for a filter with a high decimation factor while achieving similar performance of prior art poly- phase filters of greater complexity. The FIR fi...
|
|
WO/2022/216668A1 |
Techniques are provided for automatic gain control processing to reduce adverse effects associated with clipped samples resulting from conversion of analog signals to digital signals. A methodology according to an embodiment includes ide...
|
|
WO/2022/193380A1 |
Disclosed are a notch filter and a multi-frequency notch filter. The notch filter comprises at least one notch filter unit, each notch filter unit comprising an input port, an output port, at least three resonators, and at least one indu...
|
|
WO/2022/179999A1 |
The invention relates to a method for actuating a motor-driven flap assembly (1) of a motor vehicle (2). A control assembly (3) is provided for actuating a motor drive assembly (4) which is paired with the flap assembly (1), and a distan...
|
|
WO/2022/171330A1 |
The invention relates to a filter assembly, in particular for a control loop for controlling the position of at least one element. A filter assembly according to the invention has a first filter for suppressing an undesired component in ...
|
|
WO/2022/159786A1 |
An analog-to-digital converter (ADC) includes a modulator, an integrator circuit (210), and first and second differentiator circuits (220, 230). The modulator has a modulator input and a modulator output. The modulator input is configure...
|
|
WO/2022/155120A1 |
A finite impulse response (FIR) filter including a delay line and a plurality of arithmetic units. Each arithmetic unit is coupled to a different one of a plurality of tap points of the delay line, is configured to receive a respective s...
|
|
WO/2022/140607A1 |
Analysis channelizers are provided. In one embodiment, the channelizer includes an M-path filter receiving an input signal; a circular buffer in communication with the M-path filter; and an M-point inverse fast Fourier transform (IFFT) c...
|
|
WO/2022/140606A1 |
High-performance filter bank channelizers are provided. In one embodiment, a heterodyne signal shifts an input spectrum of the input signal by an offset between input and output centers, and operates at a high input sample rate. In anoth...
|
|
WO/2022/128699A1 |
An optical device (100) for characterizing flicker from an ambient light source is disclosed. The device comprises a radiation-sensitive device (105) configured to vary a current in response to incident radiation, a second or higher-orde...
|
|
WO/2022/110988A1 |
Provided are a filter unit and a filter array. The filter unit comprises: a control module (10), which is configured to parse configuration information of the filter unit, and control the selection of internal functions of the filter uni...
|
|
WO/2022/095856A1 |
Embodiments of the present application relate to the technical field of signal processing, and provide a filtering method, a server and a storage medium. In the embodiments of the present application, the amount of frequency shift of an ...
|
|
WO/2022/085866A1 |
Provided, according to one embodiment, is a method for determining a current of an electric motor or a generator, the method comprising the steps of: acquiring characteristics of a filter for filtering noise occurring in a process for de...
|
|
WO/2022/079263A1 |
A neural network system is provided, implementing a generative model for autoregressively generating a distribution for a plurality of current filter-bank samples of an audio signal, wherein the current samples correspond to a current ti...
|
|
WO/2022/055611A1 |
A subband channelizer for randomly spaced frequency groups includes: a first-stage channelizer configured to channelize a wideband input into a plurality of intermediate subbands, at least two of the plurality of intermediate subbands be...
|
|
WO/2022/028695A1 |
Embodiments of a Radio Frequency (RF) phase shifter are disclosed. In one embodiment, an RF phase shifter comprises a first transformer comprising a primary winding coupled to a first RF port of the RF phase shifter and a secondary windi...
|
|
WO/2022/020164A1 |
An integrated circuit comprising a plurality of multiplier-accumulator circuits connected in series in a linear pipeline to perform a plurality of concatenated multiply and accumulate operations, wherein each multiplier-accumulator circu...
|
|
WO/2022/015640A1 |
Methods and systems for finite impulse response filter under a constrained sampling rate. A method for constrained sampling rate filtering includes segmenting an input signal with a first rate into a defined number of streams, wherein th...
|
