| Document |
Document Title |
|
WO/2017/041950A1 |
A decoder is configured to decode a forward error correction (FEC) code. The decoder comprises a first unit configured to generate a probability value for a candidate sequence of bits to correspond to an original sequence of bits; and a ...
|
|
WO/2017/041232A1 |
The present invention relates to the field of distributed storage systems. Disclosed is an encoding and decoding framework for a binary cyclic code, the framework consisting of a linear code and an alphabet. The linear code is a binary c...
|
|
WO/2017/040999A1 |
A soft decision audio decoding system for preserving audio continuity in a digital wireless audio receiver is provided that deduces the likelihood of errors in a received digital signal, based on generated hard bits and soft bits. The so...
|
|
WO/2017/036416A1 |
Methods and apparatus are provided for use in a network such as an optical passive network (PON), and include a first decoder configured to decode an encoded data signal using a first code to generate a decoded signal. When the encoded d...
|
|
WO/2017/032255A1 |
The present disclosure relates to a system and method for decoding a data sequence. The system and method include retrieving a sequence of L bits and determining a maximum likelihood path thereof. Further, a trimming SOVA with a trimming...
|
|
WO/2017/024361A1 |
Disclosed herein is a system (10). The system (10) receives a line encoded data stream (12) from a source (14). The system (10) has a de-serialiser (16) for de-serialising the line encoded data stream (12) to generate a raw parallel data...
|
|
WO/2017/026036A1 |
A zero padding unit (111) inserts a zero bit sequence into information bits or outputs the information bits unchanged. A first error correction code encoder (101) performs first error correction encoding for the information bits and for ...
|
|
WO/2017/025823A1 |
Systems and methods are disclosed herein relating to rate-compatible polar codes and the use thereof in a wireless communications system. In some embodiments, a transmit node operable for use in a wireless communications system comprises...
|
|
WO/2017/020733A1 |
Provided is an RS error correction decoding method. The method comprises: when sending end performs encoding, with regard to an m-order primitive polynomial P(x), representing a primitive field element on a galois field GF(2m) with α, a...
|
|
WO/2017/023028A1 |
Disclosed are a multiple decoding method for a turbo and an LDPC decoder, and an apparatus thereof. A multiple decoding apparatus according to an embodiment of the present invention comprises: a plurality of unit decoding units including...
|
|
WO/2017/023079A1 |
Suggested is a method for determining data bits in polar coding without being based on channel capacity. According to one embodiment of the present invention, for an N-sized code block, the bits having even-numbered indices equal to or l...
|
|
WO/2017/023199A1 |
The proposed technology provides methods, devices and computer programs for performing data error detection and correction. It is provided a method for performing data error detection and correction. The method comprises the step S1 of p...
|
|
WO/2017/018008A1 |
The present invention improves data retention characteristics of memory cells of a memory system wherein data are encoded then written into the memory cells. A first candidate parity generation part generates, as a first candidate parity...
|
|
WO/2017/017257A1 |
Illustrative embodiments of the invention provide a data receiver for receiving useful data sent by a data transmitter using at least one data packet via a communication channel. The data receiver comprises an arrangement for receiving d...
|
|
WO/2017/018859A1 |
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE) A method and apparat...
|
|
WO/2017/011980A1 |
Embodiments of the present invention provide an information sending method and apparatus, and an information receiving method and apparatus. The sending method comprises: determining the length of a cyclic redundancy check (CRC) code acc...
|
|
WO/2017/013767A1 |
This reception apparatus comprises: a demodulator that demodulates a received signal that has been subjected to a differential modulation process; and a noise measurement unit that estimates a noise power from the received signal. The de...
|
|
WO/2017/005296A1 |
A method comprising: receiving lattice vector quantised parameter data, the parameter data representing at least one audio signal; determining within the data at least one bit error; and controlling the decoding of the data to generate a...
|
|
WO/2017/007945A1 |
According to the invention herein, the method for secure transmission of signals from a camera includes the steps of: separating output video signals from processing units inside the camera into discrete pieces; and dispersing these disc...
|
|
WO/2017/002291A1 |
The present invention is provided with: a function for receiving an information packet transmitted from a base station; a communication function for connecting to a local network for sharing information among a plurality of receiving ter...
|
|
WO/2017/003227A1 |
Disclosed are a device and a method for generating a broadcast signal frame corresponding to a time interleaver for supporting a plurality of operation modes. The device for generating a broadcast signal frame, according to one embodimen...
|
|
WO/2017/000682A1 |
A decoding method comprises: reading input data of decoding at a first semi-window stage of decoding, and processing the read input data to obtain a processing result (101); decoding the processing result at a second semi-window stage of...
|
|
WO/2017/003637A1 |
Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. T...
|
|
WO/2017/003527A1 |
An apparatus (100), as well as a method (200) and a system (400) therefor, relates generally to storing information. In such an apparatus, a memory controller (110) is for providing a code rate (112). An encoder (120) is for receiving in...
|
|
WO/2017/002813A1 |
A terminal device, comprising a receiving unit that receives a bit sequence, the bit sequence being assigned with a CRC parity bit by scrambling by means of RNTI, and if the number of CRC parity bits is a first value, the bit sequence is...
|
|
WO/2017/004583A1 |
A system and method for maximizing channel bandwidth while employing error control coding is presented. The method includes employing a cyclical redundancy check (CRC) code to information being transmitted on the channel, the CRC code in...
|
|
WO/2016/209231A1 |
Techniques for calibration of high-speed interleaved analog-to-digital converter (ADC) arrays are presented. A transceiver comprises an ADC component that comprises an array of sub-ADCs that can be interleaved to facilitate high-speed da...
|
|
WO/2016/209417A1 |
A system and method are disclosed for detecting and correcting data errors based on a plurality of syndromes for a plurality of substreams common to a transmitted data stream and a received data stream. The system assigns an index value ...
|
|
WO/2016/210212A2 |
In various embodiments, methods and systems for erasure coding with enhanced local protection groups are provided. An erasure coding scheme can be defined based on a Vertical Local Reconstruction Code (VLRC) that achieves high storage ef...
|
|
WO/2016/209564A1 |
Methods and apparatus related to efficient Solid State Drive (SSD) data compression scheme and layout are described. In one embodiment, logic, coupled to non-volatile memory, receives data (e.g., from a host) and compresses the data to g...
|
|
WO/2016/206446A1 |
A character encoding method and character decoding method having an error correction function and a product using the character encoding method. The character encoding having the error correction function consists of a data character and...
|
|
WO/2016/203039A1 |
The present invention relates to a method for coding a digital input message, having K information symbols, using a turbo encoder forming a turbo code, the turbo encoder comprising an interleaver and first and second encoders (C1, C2) en...
|
|
WO/2016/199595A1 |
The present invention relates to: a data processing device configured so that it is possible to improve communication performance by carrying out bit interleaving suitable for a modulation scheme that is a non-uniform constellation; a da...
|
|
WO/2016/197390A1 |
A method, apparatus and system for channel decoding are disclosed in the embodiments of the present invention. An apparatus for channel decoding comprises: a decoding information acquiring unit, used for acquiring decoding information of...
|
|
WO/2016/198801A1 |
The invention relates to a method for decoding a sequence y of n samples received by a decoder and, following transmission, corresponding to an encoded sequence c of n bits, obtained by applying, upon coding, a linear-error correction co...
|
|
WO/2016/195331A1 |
Provided is a receiver which includes at least one processor configured to control or execute: a first Bit-Interleaved Coded Modulation (BICM) decoder configured to generate a first output signal corresponding to an upper layer signal by...
|
|
WO/2016/194623A1 |
The present disclosure relates to a data processing device, and a data processing method, which can efficiently decode an LDPC code which has undergone bit interleave processing. The data processing device, which is one aspect of the pre...
|
|
WO/2016/191996A1 |
Disclosed in an embodiment of the present invention is a path merging method for polar code decoding. A code length of the polar code is N. The method comprises: acquiring L surviving paths before decoding determined when decoding M bits...
|
|
WO/2016/195420A1 |
A method for transmitting a broadcast signal is disclosed. The method for transmitting a broadcast signal, according to one embodiment of the present invention, comprises the steps of: delivery layer processing broadcast service data and...
|
|
WO/2016/191230A1 |
Techniques for partitioning media data are described. According to various embodiments, a set of wireless access points are selected for receiving wireless transmission of media data of a communication session. Media data of the communic...
|
|
WO/2016/186571A1 |
A method of arrangement of an algorithm to calculate cyclic redundancy check (CRC) independent of the length of a polynomial generator and data stream which can be realized in digital implementation with a calculation latency of once clo...
|
|
WO/2016/129975A9 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder which encodes input bits including outer encoded bits to generate an LDPC codeword including the input bits and parity bits to be transmitted ...
|
|
WO/2016/184493A1 |
Encoder and decoder devices for performing multi-rate and multi-length LDPC coding and decoding and methods thereof using only one stored expansion table with one corresponding expansion factor. An encoder device (200) for performing LDP...
|
|
WO/2016/185911A1 |
The present technology pertains to an encoding method and an encoding device for enabling support for DVB-Like LDPC codes and LDPC codes in ETRI format. The encoding device is provided with: a first LDPC encoding unit for generating an L...
|
|
WO/2016/186000A1 |
The objective of the present invention is to improve a transmission rate by selecting an appropriate modulation scheme and code rate, even in an environment having a high antenna correlation or an environment having contamination by a na...
|
|
WO/2016/179743A1 |
Disclosed are an encoding method and a communication device. The encoding method comprises: a communication device determining a second transmission block, wherein the second transmission block comprises a first transmission block and ch...
|
|
WO/2016/181992A1 |
The present invention reduces the computational cost of field multiplication. a represents a k-order vector with a0,..., ak-1∈GF(xq) as elements thereof. A is a matrix which has n number of rows and k number of columns, and vertically ...
|
|
WO/2016/181805A1 |
The present disclosure pertains to a data processing device and a data processing method with which it is possible to more effectively elicit the performance of an error correction code by using a time interleaver. This data processing d...
|
|
WO/2016/181978A1 |
The present invention reduces the computational cost of field multiplication. A matrix operation device 1 calculates a vector b by multiplying a vector a and a matrix A with one another, given that a represents a k-order vector having a0...
|
|
WO/2016/178630A1 |
According to various embodiments, a joint detector/decoder device may be provided. The joint detector/decoder device may include: an input circuit configured to receive an input signal; a splitting determination circuit configured to det...
|
