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WO/2016/172934A1 |
The embodiments of the present invention provide a decoder and decoding method for polar codes. The decoding method comprises: executing parallel decoding on code blocks by adopting a number L of different searching widths; and according...
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WO/2016/170832A1 |
A receiver is provided with: a demodulator for using advance information to perform a wireless-signal demodulation process in which bit sequence rearrangement (first interleaving) is performed across blocks for performing symbol interlea...
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WO/2016/170140A1 |
The invention relates to a method for controlling a check node of a NB-LDPC decoder. The check node receives dc input lists Ui and delivers and delivers dc output lists Vi, with i£ε[1...dc]. Each input list and output list comprises n ...
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WO/2016/165395A1 |
Disclosed are a decoding method and a decoder. The decoding method comprises: receiving a convolutional code of a service; de-duplicating a generator polynomial of the convolutional code to obtain a reduced order convolutional code; and ...
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WO/2016/168253A1 |
Approaches for satellite data transmissions are provided, which accommodate for periodic signal blockages without packet loss. A data stream is segmented into packets for wireless transmission, wherein the transmission is subject to a pe...
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WO/2016/162320A1 |
Decoding of a first message is disclosed, wherein first and second messages are encoded by a code (represented by a state machine) to produce first and second code words, which are received over a communication channel. A plurality of di...
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WO/2016/154968A1 |
Embodiments of the present invention provide an encoding method, an apparatus, a base station and user equipment. The method comprise: the number of the polar codes used for encoding the data block to be transmitted and the block length ...
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WO/2016/158945A1 |
An optical communication device equipped with: a hard determination processing unit 110 that stores a user signal 10 in and extracts the user signal from error correction frames, performs encoding and decoding of an external code by mean...
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WO/2016/152175A1 |
[Problem] To enable the precision with which a desired signal is decoded to be increased when carrying out multiplexing/multiple-access using power allocation. [Solution] A device equipped with: a first transmission processing unit that ...
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WO/2016/154382A1 |
A method and apparatus for efficiently providing FEC (forward error correction) encoding, in particular using quasi-cyclic LDPC codes, for transmissions in a communication network. A flexible encoder is provided for receiving information...
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WO/2016/151868A1 |
An information processing apparatus comprising a path matric storing unit for storing path metric data, a reordering unit for changing positions of the path metric data and a control unit for controlling the path metric data in Viterbi d...
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WO/2016/147058A1 |
A method in a network node comprises generating a parity-check matrix for decoding a transmission scheme. The transmission scheme comprises a repetition code, an interleaver, and a modulation having a memory property. The parity-check ma...
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WO/2016/141551A1 |
Provided in the embodiments of the present invention are an interleaving processing method and device. The apparatus comprises: a grouping unit, a bit branch unit and multiple sub-resource unit interleaving units, wherein, the grouping u...
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WO/2016/144291A1 |
Techniques for writing data to a subset of memory devices are described. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise a set of memory devices. The block of da...
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WO/2016/145315A1 |
An apparatus for measuring a level of security of an n-dimensional encoding array u, irrespective of the value of n, comprises a processor in communication with a memory and an output means. The memory comprises computer readable program...
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WO/2016/140512A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode outer-encoded bits to generate an LDPC codeword including LDPC information bits and parity bits; a puncturer configured t...
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WO/2016/140511A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted to a receiver in a cur...
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WO/2016/140510A1 |
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups...
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WO/2016/140509A1 |
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups...
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WO/2016/140514A1 |
A transmitter is provided. The transmitter includes: a segmenter configured to segment information bits into a plurality of blocks based on one of a plurality of preset reference values; an outer encoder configured to encode each of the ...
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WO/2016/140504A1 |
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to constitute Low Density Parity Chec...
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WO/2016/140513A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to group-wise interleave a plurality of bit groups inc...
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WO/2016/140516A2 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the pari...
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WO/2016/140515A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the pari...
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WO/2016/137258A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a ...
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WO/2016/137203A1 |
A zero padding apparatus and method for fixed-length signaling information are disclosed. The zero padding apparatus according to one embodiment of the present invention comprises: a processor which determines the number of groups in whi...
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WO/2016/137256A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a ...
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WO/2016/137254A1 |
A parity interleaving apparatus and method for variable-length signaling information is disclosed. A parity interleaving apparatus according to an embodiment of the present invention comprises: a processor for dividing parity bits of an ...
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WO/2016/137259A1 |
A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a ...
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WO/2016/137255A1 |
A parity puncturing device and method for variable-length signaling information are disclosed. The parity puncturing device according to one embodiment of the present invention comprises: a memory for providing a parity bit stream for pe...
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WO/2016/137205A1 |
A zero padding apparatus and method for variable-length signaling information are disclosed. The zero padding apparatus according to one embodiment of the present invention comprises: a processor which determines the number of groups in ...
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WO/2016/137204A1 |
A parity interleaving apparatus and method for fixed-length signaling information are disclosed. The parity interleaving apparatus according to one embodiment of the present invention comprises: a processor which divides, into a pluralit...
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WO/2016/137234A1 |
A transmitter is provided. The transmitter includes: a low density parity check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits; a repeater configured to select at leas...
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WO/2016/137253A1 |
A parity puncturing device and method for fixed-length signaling information are disclosed. The parity puncturing device according to one embodiment of the present invention comprises: a memory for providing a parity bit stream for perfo...
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WO/2016/132958A1 |
A transmitting device is used in a wireless transmission system. The transmitting device is provided with: a chaos coding unit which recursively codes an input analog signal by a chaos function (N-1) times (N≥2) to generate N coded ana...
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WO/2016/133933A1 |
A multi-mode viterbi decoder supporting different decoding modes. The viterbi decoder comprises circuitry to output one or more data symbol values. The circuitry sets the one or more data symbol values to a first quantity of unit interva...
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WO/2016/129393A2 |
In an advanced adaptive modulation and coding (AMC) scheme, the code rate and the parity-check matrix (PCM) for low-density parity-check (LDPC) codes are adapted according to modulation formats and variable-iteration receivers. The degre...
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WO/2016/129256A1 |
A decoding device includes: a BP decoding unit which subjects an input signal to BP decoding; a maximum likelihood decoding unit which subjects the BP-decoded signal to maximum likelihood decoding; and a selecting unit which selects eith...
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WO/2016/127853A1 |
An encoding device and an encoding method for two-dimensional product codes based on extended hamming codes. The encoding device comprises: an information input cache module, an encoding information storage circuit module, a subcode enco...
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WO/2016/126202A1 |
This invention relates to an encoding method for adding redundancy to data to be stored on a computer system or a distributed storage system. The method comprises receiving data to be encoded, selecting two integers n b and m b where n b...
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WO/2016/125485A1 |
In order to simultaneously reduce power consumption and ensure error-correction capability, a signal processing apparatus is provided with an error correction means in which a parallel connection is established among correction blocks in...
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WO/2016/121341A1 |
If a configuration is adopted which makes it possible for a modulation scheme used by an optical communication system to be switched over in accordance with transmission conditions, it is difficult to make effective use of frequency reso...
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WO/2016/119120A1 |
Provided are a decoding apparatus and method. The method comprises: acquiring a group to be decoded, and detecting whether all the codewords in the group to be decoded satisfy the condition where a checksum is zero; when all the codeword...
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WO/2016/123513A1 |
In one example, a device includes a memory configured to store video data and a video decoder configured to decode an exponential Golomb codeword representative of at least a portion of a value for an escape pixel of a palette-mode coded...
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WO/2016/118060A1 |
Embodiments herein relate to a method performed by a transmitting device (12) for transmitting information bits to a receiving device (10) in a wireless communication network (1). The transmitting device (12) encodes information bits of ...
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WO/2016/112857A1 |
An LDPC code decoder comprises: a variable node calculation unit (1100); a check node calculation unit (1200); a memory (2000) for storing iteration information of each side of an LDPC code check matrix; and a controller (300) for contro...
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WO/2016/114156A1 |
The present technology pertains to a data processing device and a data processing method configured so as to enable a plurality of block interleaving formats to efficiently coexist in data transmission using LDPC codes. In groupwise inte...
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WO/2016/112285A2 |
Methods, systems, and devices are described for wireless communications at a wireless device. A wireless device may adaptively select a parity check matrix to increase the reliability of signal transmission by adapting to different chann...
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WO/2015/175411A9 |
Disclosed is a method for the distributed storage and distribution of data. Original data is divided into fragments and erasure encoding is performed on it. The divided fragments are dispersedly stored on a plurality of storage mediums, ...
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WO/2016/107377A1 |
A data processing method and system based on quasi-cyclic LDPC. The method comprises: calculating the size of an information bit of the quasi-cyclic LDPC (S101); acquiring service data having the same space size as that of service data i...
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