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WO/2017/024943A1 |
A transmission method comprises: a site determines a composition structure of a burst, the burst comprising data and a seizing signal; the site determines a transmission sequence of the data and the seizing signal; the site determines a ...
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WO/2017/026249A1 |
The present technology relates to a reception device and a data processing method which enable visual information to be efficiently processed. The reception device receives a digital broadcast signal of an IP transmission scheme, acquire...
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WO/2017/023498A1 |
Systems, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Two Integrated Circuit (IC) devices may be collocated in an electronic apparatus and comm...
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WO/2017/019223A1 |
A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each sym...
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WO/2017/017612A1 |
Embodiments presented herein are generally directed to techniques for the transfer of isochronous stimulation data over a standardized isochronous audio or data link between components of an implantable medical device system. More specif...
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WO/2017/016321A1 |
The present invention provides a digital frequency modulation (FM) broadcast based clock synchronization method including: an FM broadcast receiver receives a wireless data broadcast signal broadcasted by an FM broadcast transmitter sync...
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WO/2017/017667A1 |
A method and a device are provided for use at one or more links of a communication network along which communications are exchanged under extremely low SNR conditions. The method comprises a step of transmitting an extended communication...
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WO/2017/014054A1 |
This technology relates to a transmission device, a transmission method, a reception device, a reception method, and a program which enable already transmitted time stamps to be dynamically changed. With respect to already transmitted ti...
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WO/2017/008885A1 |
The present invention relates to a method, a device, and a system for the error-free identification of bit values that are transmitted by means of a continuous data signal. For this purpose, an especially advantageous metric is proposed ...
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WO/2017/011591A1 |
The systems, apparatuses and methods of the present invention set forth improvements to the problems of the current pairing or duplex paradigm, resulting in a dramatic increase in fiber transmission efficiency, accomplished explicitly by...
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WO/2017/007522A1 |
Methods and apparatus are described for synchronously stepping at least one of a data phase interpolator (PI) code (306) or a crossing PI code (308) in a clock and data recovery (CDR) circuit (206) until one or more preset criteria are s...
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WO/2017/005139A1 |
Provided in an embodiment of the invention is a synchronization method for receiving and transmitting ends in an optical transmission system. The method comprises: placing information for training a receiving end link in inter-control in...
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WO/2017/007542A1 |
Method for testing a radio frequency (RF) data packet signal transceiver device under test (DUT) including detecting transitions between RF data packet signal transmission and reception by the DUT, detecting transitions between different...
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WO/2017/007517A1 |
Clock data recovery can be accomplished using a phase change determination circuit (102) that generates, based upon detected phase differences between a capture clock and data signal, a delta signal and a delta selection signal. A specul...
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WO/2017/006469A1 |
A network system 100 is provided with: a synchronization master apparatus 1 that outputs a coordination operation timing signal at a coordination operation period; a time master station 2 connected to a network; and a time slave station ...
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WO/2017/003441A1 |
Systems and methods for modifying a data stream for rate adaptation. A clock component receives a data stream at a first clock rate. In an aspect, a rate adaptation component inserts a first identification codeword into a particular loca...
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WO/2017/000713A1 |
A method and device for synchronizing clock time transport modes in an optical transport network. The method comprises: when a clock time synchronization interruption alarm occurs in a clock time node, sending a currently used clock time...
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WO/2017/000480A1 |
Disclosed in the present invention is a time synchronization method, the method comprising: performing, by a server, time synchronization with an external clock source and acquiring information of the external clock source; integrating a...
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WO/2016/209290A1 |
Systems and methods are provided in which a wireless receiver can be configured to digitally synchronize a receive sampling rate to a transmit sampling rate, and may include a digital interpolator controlled by a timing control unit with...
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WO/2016/209463A1 |
A clock and data recovery (CDR) circuit produces an in-phase clock, a quadrature clock offset by 90 degrees from the in-phase clock, and an auxiliary clock offset from the in-phase clock by a fraction of 90 degrees. A data sampler cyclic...
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WO/2016/208020A1 |
A communication device 20 is provided with: a counter 205 for counting time; a counter value holding unit 206 for storing the counter value of the counter when a packet addressed to the communication device or a broadcasted packet is rec...
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WO/2016/207758A1 |
A system for determining a correction for an output value of a time-to-digital converter within a phase-locked loop is provided. The output value relates to a time difference between an input signal and a reference signal supplied to the...
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WO/2016/208285A1 |
[Problem] To provide a communication control device, a communication control method, a network switch, a pathway control method and a communication system. [Solution] This communication control device is provided with: a synchronization ...
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WO/2016/203997A1 |
The output control device is characterized by comprising a signal input unit that inputs an audio signal, a first output unit that outputs the audio signal to a first playback device, a second output unit that outputs the audio signal to...
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WO/2016/203529A1 |
The objective of the present invention is to reduce circuit size. The present invention is a system which performs bidirectional communication between a master side and a slave side, which are connected to a single communication line (L1...
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WO/2016/203987A1 |
This transmission device is provided with: a clock signal transmission circuit that outputs a clock signal to a clock signal line; a data signal transmission circuit that outputs a data signal to a data signal line; and a blanking contro...
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WO/2016/203968A1 |
The present technology pertains to a broadcast receiver, method, and program with which it is possible to synchronize packets at a higher speed. A slot detection unit supplies a transmission signal comprising a plurality of slots to a sy...
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WO/2016/203721A1 |
The present invention addresses the problem of reducing the possibility of erroneously acquiring data included in a communication signal. A communication device (10) is provided with a reception unit (11) and a control unit (13). The rec...
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WO/2016/197324A1 |
Provided is a signal processing method, comprising: dividing a frequency band for sending a downlink synchronization symbol into at least two parts of non-overlapping frequency bands, the two parts of frequency bands being a first freque...
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WO/2016/199604A1 |
The present invention pertains to a signal processing device, a signal processing method, and a program, configured so that it is possible to transmit time information using the type length value (TLV). The present invention is provided ...
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WO/2016/199603A1 |
This technology relates to a signal processing device, a signal processing method, and a program which enable transmission of a TLV. A signal processing device is provided with: a demodulation processing unit that performs demodulation p...
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WO/2016/200410A1 |
Systems and methods for performing clock recovery on a received signal using a split loop architecture are described. A split loop timing recovery apparatus is provided comprising a first path configured for performing frequency offset t...
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WO/2016/199078A2 |
The present disclosure relates to a system for initiating a call from a landline that is mapped to a caller mobile phone, wherein system includes a call request receipt module configured to, at a first computing device, receive, from the...
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WO/2016/192399A1 |
A method and an apparatus for implementing alternate BMC. The method comprises: setting nodes in clock communication on and outside a loop as looped network time nodes, and configuring Localpriority attributes of the looped network time ...
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WO/2016/194518A1 |
[Problem] The purpose of the present invention is to enable the regeneration of a reference clock at a base station, even in an environment in which a GNSS signal or network signal cannot be received. [Solution] This synchronization sign...
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WO/2016/191851A1 |
Ultra-Wideband (UWB) technology exploits modulated coded impulses over a wide frequency spectrum with very low power over a short distance for digital data transmission. Today's leading edge modulated sinusoidal wave wireless communicati...
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WO/2016/193360A1 |
A device and method for frame synchronizing in a receiver of a communication system, wherein a frame, transmitted in a signal out of a J-PSK constellation, is received comprising a data sequence (d), a syncronization marker (s) of length...
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WO/2016/060780A9 |
A circuit includes a first die having a first array of exposed data nodes, and a second die having a second array of exposed data nodes, wherein a given data node of the first array corresponds to a respective data node on the second arr...
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WO/2016/191020A1 |
A network such as an in-vehicle powerline communication (PLC) network may allow PLC nodes to communicate over existing powerlines. Provided in the present disclosure are exemplary techniques for synchronizing network nodes (e.g., PLC nod...
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WO/2016/189995A1 |
Provided are a communication system, a smart meter, a gateway device, and a communication program, with which it is possible to ensure communication between the gateway device, which in order to conserve power consumption may not always ...
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WO/2016/188090A1 |
Disclosed are a clock recovery method and apparatus. The method comprises: reading a water level of a control buffer, the water level of the control buffer being used for representing a difference between a write-in data volume and a wri...
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WO/2016/190537A1 |
A machine-to-machine communication method for coverage expansion comprises the steps of: allocating a system bandwidth, of a predetermined size, for transmission; and transmitting system information and/or data from which a master inform...
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WO/2016/189578A1 |
A communication apparatus using the SPI communication method has a plurality of slave communication units for one master communication unit, and a power conversion apparatus uses this communication apparatus. The master communication uni...
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WO/2016/188026A1 |
Provided are a time synchronization method and a device between a primary main board and a standby main board. The method comprises: when forwarding a precise time synchronization protocol PTP message between an active main board decided...
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WO/2016/185585A1 |
Provided are an electric circuit and a display device having the electric circuit. The electric circuit comprises a transmission unit and one or more reception units that perform data frame communications with the transmission unit via a...
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WO/2016/184369A1 |
Provided are a method for configuring clock tracking and a control device. The method comprises: a control device acquiring a topology structure of a network, wherein the network comprises a first non-clock source node and n clock source...
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WO/2016/184291A1 |
Disclosed is a frame header detection method, comprising: receiving a data stream of frame data, and caching the received data according to the length of M bits, so that groups of bit sequences, with each group having a length of M bits,...
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WO/2016/184018A1 |
The present invention provides a clock output method and apparatus. The method comprises: a digital phase-locked loop (DPLL) receives an output recovery clock, wherein the DPLL is configured by using a logical resource of a chip; and the...
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WO/2016/186840A1 |
A method (600) is provided. The method (600) includes receiving (605), at a first device (105A), a request to transfer data over a Management Data Input/Output (MDIO) communication bus (115). The first device (105) is configured to gener...
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WO/2016/179777A1 |
The embodiments disclose a method of determining guard period for downlink-to-uplink switching in an access point of a time division duplex radio communication network. For each of a plurality of terminal devices served by the access poi...
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