Title:
【発明の名称】半導体研磨用ベルト
Document Type and Number:
Japanese Patent JP2002528277
Kind Code:
A
Abstract:
A seamless, composite belt that is designed to maintain a substantially flat surface in the span between two rollers. The belts typically have one or more polymer layers, including the polishing layer, and one or more supporting woven or non-woven layers. The belts have the necessary balance between down-cupping and up-cupping forces achieved by: 1) varying the relative thickness of the different polymer and supporting layers in the belt, 2) varying the relative hardness or rigidity of the different layers in the belt, 3) varying the temperatures at which the different layers are formed, 4) varying the compositions of supporting layers, and 5) prestressing one or more of the composite layers. The belts are particularly useful in chemical mechanical polishing of semiconductor wafers.
Inventors:
Brian Lombard
Application Number:
JP2000578140A
Publication Date:
September 03, 2002
Filing Date:
October 22, 1999
Export Citation:
Assignee:
Peripheral Products Incorporated
International Classes:
B24B21/04; B24B37/11; B24D11/00; B24D11/04; B24D11/06; H01L21/304; (IPC1-7): B24D11/06; B24B37/00; B24D11/00; B24D11/04; H01L21/304
Attorney, Agent or Firm:
Aoyama Ryo (2 outside people)