Title:
パッケージ化マイクロ電子イメージャおよびマイクロ電子イメージャをパッケージ化する方法
Document Type and Number:
Japanese Patent JP2008505481
Kind Code:
A
Abstract:
Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.
Inventors:
Salman, Akram
Charles M. Watkins
Kyle, Kay. Kirby
Alan, G. Wood
William, M. Hyatt
Charles M. Watkins
Kyle, Kay. Kirby
Alan, G. Wood
William, M. Hyatt
Application Number:
JP2007519188A
Publication Date:
February 21, 2008
Filing Date:
November 09, 2004
Export Citation:
Assignee:
MICRON TECHNOLOGY,INCORPORATED
International Classes:
H01L25/16; H01L27/146; H01L27/148; H01L31/02; H04N5/335
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki