Title:
シリコン・ゲルマニウム・バッファで絶縁体上に歪みSi/SiGeを形成する方法
Document Type and Number:
Japanese Patent JP2008505482
Kind Code:
A
Abstract:
A method is disclosed for forming a semiconductor wafer having a strained Si or SiGe layer on an insulator layer. The method produces a structure having a SiGe buffer layer between the insulator layer and the strained Si or SiGe layer, but eliminates the need for Si epitaxy after bonding. The method also eliminates interfacial contamination between strained Si and SiGe buffer layer, and allows the formation of Si/SiGe layers having a total thickness exceeding the critical thickness of the strained Si layer.
Inventors:
Chan, Hoosier
Bedel, Stephen, W
Bedel, Stephen, W
Application Number:
JP2007519189A
Publication Date:
February 21, 2008
Filing Date:
February 16, 2005
Export Citation:
Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
H01L21/02; H01L21/20; H01L21/336; H01L21/762; H01L27/12; H01L29/161; H01L29/786
Domestic Patent References:
| JP2004510350A | 2004-04-02 |
Foreign References:
| WO2004006327A2 | 2004-01-15 | |||
| WO2004027858A1 | 2004-04-01 |
Attorney, Agent or Firm:
Takeshi Ueno
Tasaichi Tanae
Yoshihiro City
Hiroshi Sakaguchi
Tasaichi Tanae
Yoshihiro City
Hiroshi Sakaguchi
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