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Title:
CLOCK GENERATING CIRCUIT, SWITCHING POWER SUPPLY, AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2019220732
Kind Code:
A
Abstract:
To obtain an output clock of desired duty from an external clock.SOLUTION: A clock generating circuit generating an output clock (CLK) by using an external clock as an object clock when an external clock (CK_EX) is inputted, includes a clock output circuit (18) for switching the output clock to high level in synchronism with the up edge of the object clock, circuits (11, C1) generating a first ramp voltage (Va) with a section between adjoining up edges of the object clock as a period, circuits (12, C2) generating a second ramp voltage (Vb) with that section as a period, a circuit (C3) for holding a comparison voltage (Vc) according to the second ramp voltage when up edge of the object clock occurs, and a comparator (14) for comparing the first ramp voltage and the comparison voltage. The clock output circuit changes the level of the output clock from high level to low level on the basis of the comparison result of the comparator.SELECTED DRAWING: Figure 4

Inventors:
YOSHIDA TAKEHIRO
FUKUSHIMA SHUN
Application Number:
JP2018114197A
Publication Date:
December 26, 2019
Filing Date:
June 15, 2018
Export Citation:
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Assignee:
ROHM CO LTD
International Classes:
H03K5/04; G06F1/08; H02M3/155
Domestic Patent References:
JP2009164875A2009-07-23
JP2017038150A2017-02-16
JPH08107312A1996-04-23
JP2016134916A2016-07-25
JP2006287736A2006-10-19
JPH03283912A1991-12-13
Attorney, Agent or Firm:
Sano patent office