Title:
【発明の名称】集積半導体回路内の発生器回路
Document Type and Number:
Japanese Patent JP2613579
Kind Code:
B2
Abstract:
A generator circuit in an integrated semiconductor circuit for generating a clock voltage having a voltage being raised with respect to a supply potential of the generator circuit includes a first CMOS inverter having an input connected to a first clock signal and having an output carrying a clock voltage as an output signal of the generator circuit. A second CMOS inverter has an input connected to a second clock signal and has an output. The inverters have transistors of a first conduction type with source terminals. A transfer transistor of the first conduction type is connected between the source terminals and a supply potential. A capacitor is connected between the source terminals and a pump signal. The transfer transistor has a gate terminal connected to the output of the second CMOS inverter.
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Inventors:
Hanspeter, Fuchs
Application Number:
JP14146588A
Publication Date:
May 28, 1997
Filing Date:
June 08, 1988
Export Citation:
Assignee:
Siemens, Actien Gezershaft
International Classes:
H03K17/06; G11C5/14; G11C8/00; G11C8/18; H03K5/02; (IPC1-7): H03K5/02
Attorney, Agent or Firm:
Tomimura Kiyoshi