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Title:
【発明の名称】半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3163092
Kind Code:
B2
Abstract:
On the surface of an insulating substrate, a semi-conductor layer composed of a semiconductor layer of a first conductivity type on which a high-concentration semiconductor layer of the first conductivity type is formed. By selectively etching the semiconductor layer, the high-concentration external base region of the first conductivity is left, and at the same time, only a thicker prospective internal base region just under the external base region and a prospective emitter region and prospective collector region, which are located on both sides of the prospective internal base region and have steps between themselves and the prospective internal base region, are left to form island regions. A sidewall insulating film is formed which covers at least the sidewalls on the prospective collector region side among sidewalls of the external base region and sidewalls at the steps of the prospective internal base region adjoining the sidewalls of the external base region. The emitter region and collector region of the second conductivity type are formed by ion implantation perpendicular to the substrate with the insulating film covering the external base region and the sidewall insulating film as blocking mask.

Inventors:
Makoto Yoshimi
Minoru Takahashi
Application Number:
JP20933990A
Publication Date:
May 08, 2001
Filing Date:
August 09, 1990
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
H01L21/331; H01L21/762; H01L21/764; H01L21/8222; H01L21/8248; H01L21/8249; H01L21/86; H01L27/06; H01L27/12; H01L29/165; H01L29/73; H01L29/786; (IPC1-7): H01L21/331; H01L27/06; H01L29/165
Domestic Patent References:
JP1192171A
JP1298767A
JP60157252A
JP637665A
JP6057643A
JP61216469A
JP62271472A
JP249464A
Attorney, Agent or Firm:
Hideaki Togawa