CMOS論理回路 - New Japan Radio Co., Ltd.

Title:

CMOS論理回路

Document Type and Number:

Japanese Patent JP4370229

Kind Code:

B2

More Like This:

JP2017092578	MULTIVALUED NOT-LOGIC TWO-STAGE CONNECTION MEANS BASED ON PRINCIPLES OF HOOJI ALGEBRA, MULTIVALUED NOT-LOGIC AND EVEN-LOGIC TWO-STAGE CONNECTION MEANS BASED ON PRINCIPLES OF HOOJI ALGEBRA, MULTIVALUED EVEN-LOGIC TWO-STAGE CONNECTION MEANS BASED ON PRINCIPLES OF HOOJI ALGEBRA, MULTIVALUED EVEN-LOGIC AND NOT-LOGIC TWO-STAGE CONNECTION MEANS BASED ON PRINCIPLES OF HOOJI ALGEBRA, MULTIVALUED LOGIC COMPLETENESS CIRCUIT BASED ON PRINCIPLES OF HOOJI ALGEBRA, MULTIVALUED BUFFER CIRCUIT, AND CIRCUIT FOR DISCRIMINATING NUMERICAL VALUE USED IN MULTIPLE VALUE
WO/2006/115075	SEMICONDUCTOR INTEGRATED CIRCUIT
JPH11163718	LOGIC GATE

Inventors:

Hideki Fukuda

Application Number:

JP2004254090A

Publication Date:

November 25, 2009

Filing Date:

September 01, 2004

Export Citation:

Assignee:

New Japan Radio Co., Ltd.

International Classes:

H03K19/20; G06F7/50; H03K19/096

Domestic Patent References:

Attorney, Agent or Firm:

Tsuneaki Nagao

Previous Patent: ネジ収納具

Next Patent: FIBER CRIMPER