Title:
シリアル・バス・フレームの応答時間予測方法
Document Type and Number:
Japanese Patent JP4680194
Kind Code:
B2
Abstract:
A method for predicting the worst case response time for a frame in a frame queuing system, where frames are grouped together in transactions. In order to achieve an analysis that better models the transactions present in the serial bus network, the transaction concept has been redefined compared to prior art, resulting in a different approach when implementing the analysis. According to the invention, the transaction period is longer than the frame periods comprised therein, and is defined as the LCM of the frame periods. As a result, several instances of a frame of a given priority may occur in one transaction, which alters the process of estimating response time. The queuing system can for example be the serial bus of a serial bus network, and the analysis can then be adapted to handle transmit queue budgets.
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Inventors:
Suscurry, Alexander
Application Number:
JP2006526569A
Publication Date:
May 11, 2011
Filing Date:
September 13, 2004
Export Citation:
Assignee:
Mentor Graphics Corporation
International Classes:
H04L12/40; H04L12/413
Domestic Patent References:
| JP11163900A | ||||
| JP9200234A | ||||
| JP11261611A |
Attorney, Agent or Firm:
Hideto Asamura
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu