Title:
半導体装置及びソース電圧制御方法
Document Type and Number:
Japanese Patent JP4680195
Kind Code:
B2
Abstract:
The precharge circuit is provided for precharging, before programming the data, the voltage of the source line ARVSS commonly connected to the memory cells provided in the same sector. The voltage of the source line ARVSS of the memory cell MC is precharged before programming the data, and the voltage of the source line ARVSS of the memory cell MC is not lowered at the time of programming the data, even if the data programming period is shortened. It is thus possible to prevent the leak current during the programming and program the data into the memory cell MC optimally.
Inventors:
Kurosaki Kazuhide
Shigekazu Yamada
Masaru Yano
Shigekazu Yamada
Masaru Yano
Application Number:
JP2006527594A
Publication Date:
May 11, 2011
Filing Date:
June 25, 2004
Export Citation:
Assignee:
Spansion LLC
International Classes:
G11C16/06; G11C7/00; G11C16/02; G11C16/30
Domestic Patent References:
| JPH1145587A | 1999-02-16 | |||
| JPS57205895A | 1982-12-17 | |||
| JPS5977700A | 1984-05-04 | |||
| JPH05205895A | 1993-08-13 | |||
| JP2003123493A | 2003-04-25 |
Foreign References:
| WO2001013377A1 | 2001-02-22 |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Masayuki Sakai
Nobuo Arakawa
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Masayuki Sakai
Nobuo Arakawa