Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP5052580
Kind Code:
B2
Abstract:
A semiconductor memory device includes: a semiconductor substrate; a first device-isolation insulation film that divides the semiconductor substrate at a first transistor region into first device regions; a second device-isolation insulation film that divides the semiconductor substrate at a second transistor region into second device regions; a plurality of first transistors formed in the first transistor region; a plurality of second transistors formed in the second transistor region; and an anti-inversion diffusion layer formed under the first device-isolation insulation film. Each of the first and second transistors includes, respectively: a first and second gate insulation film provided respectively on the first and second device regions; a first and second gate electrode provided respectively on the first and second gate insulation films; and a first and second diffusion layer formed respectively on a surface of the semiconductor substrate so as to sandwich the first and second gate electrodes.
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Inventors:
Norihisa Arai
Application Number:
JP2009228921A
Publication Date:
October 17, 2012
Filing Date:
September 30, 2009
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L27/115; H01L21/336; H01L21/76; H01L21/8234; H01L21/8247; H01L27/088; H01L27/10; H01L29/788; H01L29/792
Domestic Patent References:
| JP2002100675A | ||||
| JP2003086766A | ||||
| JP2008198866A | ||||
| JP2006080310A | ||||
| JP2005072563A |
Attorney, Agent or Firm:
Fujiwara Yasutaka