Title:
半導体記憶装置
Document Type and Number:
Japanese Patent JP5601372
Kind Code:
B2
Abstract:
A semiconductor storage device comprises a memory cell array having memory cells each configured to hold data, a plurality of N ports, a port selection circuit that selects M (M
Inventors:
Yukitoshi Hanafusa
Manabu Ito
Manabu Ito
Application Number:
JP2012530421A
Publication Date:
October 08, 2014
Filing Date:
August 25, 2010
Export Citation:
Assignee:
FUJITSU, LTD.
International Classes:
G11C11/413; G11C11/412; G11C29/00
Domestic Patent References:
| JPH06295600A | 1994-10-21 | |||
| JP2005346837A | 2005-12-15 | |||
| JPH04184789A | 1992-07-01 | |||
| JPH0528770A | 1993-02-05 | |||
| JPS62175992A | 1987-08-01 | |||
| JP2005346837A | 2005-12-15 | |||
| JP2010170595A | 2010-08-05 | |||
| JPH06295600A | 1994-10-21 | |||
| JPH0528770A | 1993-02-05 | |||
| JPS62175992A | 1987-08-01 |
Attorney, Agent or Firm:
Junichi Yokoyama