PURPOSE: To reduce the layout area of a circuit by a method wherein a part of a connection wiring between a plurality of I2LS is arranged on the base of the pnp transistor of I2L through the intermediary of an insulation film.
CONSTITUTION: There is a gap between the injector wiring of I2L and the base or collector terminal of the pnp transistor thereof. By laying a connection wiring 23 between I2Ls through this gap, the number of wirings which have been laid usually on the base of an npn transistor can be reduced, and this method is very effective, in particular, for a cell wherein a collector is wired in parallel to an inductor. By this constitution, an idle space of the npn transistor is reduced, and thereby the layout area of a circuit can be diminished. In addition, it enables the prevention of the useless fall of the current amplification factor of the npn transistor, and the reduction of a junction capacity, and thus the degree of freedom of a design of layout is increased.
| JPH01260847 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
| JPS5599740 | SEMICONDUCTOR DEVICE |
INABA TOORU
OKABE TAKAHIRO
WATABE TOMOYUKI
| JPS5215359A | 1977-02-04 | |||
| JPS4935030A | 1974-04-01 | |||
| JPS4736821A | ||||
| JPS5370686A | 1978-06-23 |