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Title:
AD CONVERTER OF NON-LINEAR QUANTIZATION
Document Type and Number:
Japanese Patent JPS555539
Kind Code:
A
Abstract:

PURPOSE: To obtain sufficient accuracy without performance requirements in high degree to operational amplifiers and so on, by detecting the level of analog signal before sample hold and performing the next processing through obtaining the presence of necessity for the compression of waveform.

CONSTITUTION: Analog input signal is fed to the analog delay circuit 2 and the voltage comparator 8 via the low pass filter 1, and the signal delayed in the circuit 2 is fed to one terminal a of the electronic switch 4 directly if no compression for the signal delayed in the circuit 2 is requred, and it is fed to another terminal b of the switch 4 after the compression at the resistor attenuator 3 if required. After that, this output is amplified at the amplifier 5, sample-held at the sample hold circuit 6 being into the digital signal at the A/D converter 7 for linear quantization. On the other hand, at the voltage comparator 8, the input signal is compared into a given level, and it is fed to the switch 4 via the OR gate 12 after being latched at the latch circuits 9 to 11. Further, the output of the gate 12 is delayed at the digital delay circuit 13 and outputted to the poststate with the converter 7.


Inventors:
MORI HIROICHI
SUDOU KENGO
IWAZAWA MAKOTO
Application Number:
JP7838378A
Publication Date:
January 16, 1980
Filing Date:
June 27, 1978
Export Citation:
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Assignee:
SHARP KK
International Classes:
H03M1/18; (IPC1-7): H03K13/02