Title:
ADAPTIVE FILTER
Document Type and Number:
Japanese Patent JP3368575
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To decrease the circuit scale without lowering the processing speed by giving phase rotation, corresponding to polyphase phase modulation to a replica of one series by a replica generator, generating another replica, and reducing multiplication needed for replica generation.
SOLUTION: The replica generator 14 generates an estimated value (replica) of a receive signal, corresponding to candidate series of respective transmit signals. An adder 12 calculates differences between replicas corresponding to the respective series and the receive signal and on the basis of the result, a most likelihood series estimation unit 15 estimates a transmit signal. Then the replica generator 14 convolutes transmission candidate series with estimated impulse response to generate a replica. Namely, the replica generator 14 gives phase rotation corresponding to polyphase phase modulation to one series to generate a replica of another series. Then M×αM multipliers, which was needed for a modulation multi-valued number α and restriction length M, are reduced to M to decrease the circuit scale without lowering the processing speed.
Inventors:
Akira Tano
Yoichi Saito
Yoichi Saito
Application Number:
JP27370796A
Publication Date:
January 20, 2003
Filing Date:
October 16, 1996
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
H03H21/00; H03H17/00; H04B7/005; (IPC1-7): H04B7/005
Domestic Patent References:
| JP870329A | ||||
| JP722970A | ||||
| JP1013317A |
Other References:
田野 哲，斉藤 洋一，“移動通信のための高速処理ＱＶＬＭＳ−ＭＬＳＥ等化器 メガビットオーダの高速通信への適用”，電子情報通信学会論文誌 Ｂ−ＩＩ，１９９８年 １月２５日，Ｖｏｌ．Ｊ８１−Ｂ−ＩＩ，Ｎｏ．１，ｐｐ．１０−１８
Attorney, Agent or Firm:
Naotaka Ide (1 person outside)
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