Title:
MOST LIKELIHOOD SEQUENCE ESTIMATION CIRCUIT
Document Type and Number:
Japanese Patent JP3368574
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To greatly improve a code error rate even in the case that the delay amount of delay waves is small by estimating a most likelihood sequence from estimated error signals for which estimated reception signals obtained for the respective code words of respective paths are subtracted from reception signals.
SOLUTION: In a subtractor 10, the estimated reception signals B obtained for the respective code words of the respective paths are subtracted from the reception signals A and the estimated error signals C are attained. Also, an estimated reception signal generation circuit 21 defines a communication line state estimated value H estimated in an adaptive communication line state estimation circuit 51 with an initial communication line state estimation circuit as a coefficient, inputs a temporary judgement value G and a re-modulation signal J, multiplies respectively corresponding coefficients and outputs the signals B. At the time, the value G is generated from the remaining path of a viterbi algorithm processing circuit 61 and the code word for state transition and the signal J is generated from a waveform shaping filter #1. In this case, the signals C are converted to absolute value likelihood signals E in an absolute calculation circuit 40 and a maximum likelihood sequence estimated result I is outputted in the circuit 61. Thus, the code error rate is improved.
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Inventors:
Youichi Matsumoto
Application Number:
JP22829996A
Publication Date:
January 20, 2003
Filing Date:
August 29, 1996
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
H04L27/00; H03M13/23; H04B1/10; H04B7/005; (IPC1-7): H04B7/005; H04B1/10; H04L27/00
Domestic Patent References:
| JP66265A | ||||
| JP6326741A | ||||
| JP669757A |
Other References:
【文献】国際公開95/12926(WO,A1)
Attorney, Agent or Firm:
Takashi Homma