To prevent the contrast of the image of a wafer mark and the background from lowering when the images of a mask mark and a wafer mark are picked up simultaneously under a state where a mask and a wafer are arranged in proximity to each other.
In an aligner where a mask 30 is above a wafer 40 in proximity thereto and a mask pattern formed on the mask 30 is transferred to a resist layer on the wafer 40, the mask 30 and the wafer 40 are aligned using an image pickup unit. The image pickup unit picks up a mask mark MM for alignment provided on the mask 30 and a wafer mark MW for alignment provided on the wafer simultaneously. Openings 32 and 32 are made in the mask 30 within a specified range corresponding to the image pickup range of the wafer mark MW by the image pickup means which picks up the wafer mark MW through the openings 32 and 32 made in the mask 30.
KOIKE KAORU
SONY CORP