To provide an amplifier and a semiconductor device that suppress power consumption in a power-down state.
An amplifier 10 includes: a PMOS transistor 12C configured to enter a block state to block a supply of driving voltage to a gate of a PMOS transistor 12A when an input inverted power-down signal indicates a normal operating state of a differential amplification circuit 12, and enter a supply state to supply a driving voltage to the gate of the PMOS transistor 12A when a power-down state of the differential amplification circuit 12 is indicated; and a PMOS transistor 12D configured to bring the gate and a drain of the PMOS transistor 12A to a conductive state when an input power-down signal indicates the normal operating state of the differential amplification circuit 12, and bring the gate and the drain of the PMOS transistor 12A to a nonconductive state when the power-down state of the differential amplification circuit 12 is indicated.
| JP4167098 | Current sense amplifier |
| JP4838685 | Differential amplifier circuit |
| JP2000209043A | 2000-07-28 | |||
| JP2009201044A | 2009-09-03 | |||
| JPH0595266A | 1993-04-16 |
Kato Kazunori
Hiroshi Fukuda
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