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Patent Searching and Data


Title:
ANALOG-DIGITAL CONVERTER
Document Type and Number:
Japanese Patent JPS5875324
Kind Code:
A
Abstract:

PURPOSE: To decrease the number of component elements and to facilitate the formation of an IC, by comparaing successively the voltage dividing level between reference voltage levels with an analog input, through a multiplexer basing on a binary researching system.

CONSTITUTION: When an A-D conversion instruction STC is applied to a sequencer 11, the voltage level of an analog input AIN is compared with each voltage dividing level. The result of this comparison is stored in a 3-bit register 2. The state is decided for multiplexers 3 and 4 from the contents of 3-bit digital data D0∼D2, and reference voltages VR1 and VR2 are produced by amplifiers 5 and 6. Then the voltage dividing level of resistance between the VR1 and VR2 is compared with the input AIN by a binary researching system comprising a multiplexer 7, a comparator 8 and a sequential comparison register 9. Thus the digital data of lower 5 bits is obtained. Then a conversion end signal EOC is delivered when the final data D7 is obtained. Thus the digital data D1∼D7 are all obtained to the input AIN.


Inventors:
SAKAMOTO TATSU
Application Number:
JP17326881A
Publication Date:
May 07, 1983
Filing Date:
October 29, 1981
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H03M1/14; H03M1/36; H03M1/46; (IPC1-7): H03K13/17
Domestic Patent References:
JPS5623026A1981-03-04
Attorney, Agent or Firm:
Takehiko Suzue