PURPOSE: To drive a processor at a basic period without being influenced by an error detecting redundant bit formation time of an error detecting circuit for detecting an error of a memory in an arithmetic circuit constituted of a processor for executing processing at a basic period and a high speed memory to be accessed within the basic period.

CONSTITUTION: The arithmetic unit is provided with the processor 11, a data memory 12 for reading/writing data and a memory 15 for storing an error detecting redundant bit for detecting an error in the data and error detection in a certain memory access always within the basic period and the data is executed like a pipeline so that operation observed from the processor is executed within the basic period. Consequently the reliability o the memory can be secured and a computing element can be driven at its maximum speed.