To correctly execute a logical processing even when an input signal is in one side of a complementary signal and to unnecessitate an inverter by permitting a first logic element to be conductive by means of first information within binary information and to be nonconductive by means of second information and permitting the second logic element to be conductive by second information and nonconductive by means of first information.
The two kinds of complementary elements with opposite logical operations are used. That is, the first element to be conductive by receiving one of binary information and to be nonconductive by receiving zero and the second element to be nonconductive by receiving one and to be conductive by receiving zero are provided. N-channel MOSFET 8 is made to correspond to a one branch and p-channel MOSFET 10 is made to correspond to a zero branch as against a BDD graph in order to execute a BDD (binary dicision graph) logic circuit. The input signals A and B without inversion are inputted to the gate of p-channel MOSFET 10 so that the logical processing is executed.
JPS58154039 | LOGICAL CIRCUIT |
WO/1996/042048 | CIRCUIT FOR PRODUCING LOGIC ELEMENTS REPRESENTABLE BY THRESHOLD EQUATIONS |
WO/1989/002120 | HIGH-SPEED DIGITAL ADDING SYSTEM |
DOUSEKI TAKAKUNI
JPS6236974A | 1987-02-17 | |||
JPS61107855A | 1986-05-26 |