PURPOSE: To reduce the area of a transistor, and to lower junction capacitance and parasitic resistance by forming a leading out electrode around a collector region, shaping the internal base region of the electrode and forming an emitter region inside the leading-out electrode connected to the base region.

CONSTITUTION: A base region 15 is shaped inside the leading-out electrode 51 of a collector region, and an emitter region 16 is formed inside the leading out electrode 7 of the base region 15. Consequently, the emitter region 16 is shaped at a place separate only by a distance determined by the film thickness of a first insulating film 6, the base leading-out electrode 7 and a second insulating film 8 from a collector leading-out electrode 5. As a result, the base leading out electrode 7 and an emitter leading-out electrode 18 are formed at positions separate at a constant distance in a self-alignment manner to the collector leading-out electrode 5. Accordingly, the area of a transistor is reduced, and junction capacitance and parasitic resistance are lowered.