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Title:
基板情報取得変換方法とそのプログラムおよび装置
Document Type and Number:
Japanese Patent JP4980684
Kind Code:
B2
Abstract:
A circuit information acquisition and conversion device, a method, and a program therefor for acquiring a layer (2) (3) configuration, wire traces (2) and shapes of via holes (4) from circuit board design information; optimizing, before conversion into an analysis model, the output target range of the via holes (4) on the basis of a package area, heat density distribution, and power consumption; and creating an analysis model that is suitable for a purpose of the analysis are provided.

Inventors:
Akira Ueda
Shuji Matsushita
Application Number:
JP2006269359A
Publication Date:
July 18, 2012
Filing Date:
September 29, 2006
Export Citation:
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Assignee:
富士通株式会社
International Classes:
G06F17/50; H05K3/00
Domestic Patent References:
JP2006053706A
JP2006053747A
Other References:
Tien-Yu (Tom) Lee,“An investigation of thermal enhancement on flip chip plastic BGA packages using CFD tool”,Components and Packaging Technologies, IEEE Transactions on ,2000年 9月,Vol.23 / No.3,481-489頁
Li Shang, Li-Shiuan Peh, Amit Kumar and Niraj K.Jha,“Thermal Modeling, Characterization and Management of On-Chip Networks”,Microarchitecture, 2004. MICRO-37 2004. 37th International Symposium on ,2004年12月 4日,67-78頁
Attorney, Agent or Firm:
Yoshiyuki Osuga
Motoaki Hisagi



 
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