Title:
SUBSTRATE INSPECTION DEVICE AND SUBSTRATE INSPECTION METHOD
Document Type and Number:
Japanese Patent JP2018054432
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a substrate inspection device with which it is possible to accurately perform inspection.SOLUTION: A wafer inspection device 10 comprises: a chuck top 20 on which is placed a wafer W where a semiconductor device is formed; a probe card 18 having a plurality of contact probes 28 projecting toward the wafer W; a pogo frame 23 for holding the probe card 18; a cylindrical stretchable inside bellows 26 drooping from a pogo frame 23 so as to enclose each contact probe 28; and a cylindrical stretchable outside bellows 27 drooping from the pogo frame 23 so as to enclose the inside bellows 26. When the chuck top 20 is moved closer to the probe card 18 to bring each contact probe 28 into contact with a device, the inside bellows 26 and the outside bellows 27 come in contact with the chuck top 20 and form a sealed space P therebetween, with the sealed space P pressurized.SELECTED DRAWING: Figure 3
Inventors:
YAMADA HIROSHI
Application Number:
JP2016189999A
Publication Date:
April 05, 2018
Filing Date:
September 28, 2016
Export Citation:
Assignee:
TOKYO ELECTRON LTD
International Classes:
G01R31/28; G01R31/26; H01L21/66
Domestic Patent References:
| JP2013254812A | 2013-12-19 | |||
| JP2011198243A | 2011-10-06 | |||
| JP2014002171A | 2014-01-09 |
Attorney, Agent or Firm:
Another role Shigehisa
Satoshi Muramatsu
Satoshi Muramatsu