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Patent Searching and Data


Title:
BOOSTER CIRCUIT
Document Type and Number:
Japanese Patent JPH01264561
Kind Code:
A
Abstract:

PURPOSE: To automatically switch boosting magnification by providing first second capacitors, first third unidirectional elements, and an output capacitor, and selectively securing the output signal of a second driving circuit to a power source voltage side.

CONSTITUTION: A booster circuit using a level converter is formed on one semiconductor substrate, and a pulse signal CLK is input at a signal level of 58 to an inverter N1. The output pulse of the inverter N1 is supplied to the gate of a driving MOSFETQ1, and FETs Q5∼Q6 are provided in a latching state to a power source Vcc. In order to automatically switch the boosting magnification of the output voltage in response to the rise of the voltage Vcc, a series circuit of a Zener diode ZD1 and a FET Q8 is provided. Thus, if the voltage Vcc becomes a Zener voltage or higher, the FET Q7 is turned ON, and the output signal (b) of a level converter is secured to the high level of the voltage Vcc.


Inventors:
MOCHIZUKI HIROTAKA
NUNOKAWA YASUHIRO
Application Number:
JP9147888A
Publication Date:
October 20, 1989
Filing Date:
April 15, 1988
Export Citation:
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Assignee:
HITACHI LTD
HITACHI MICROCUMPUTER ENG
International Classes:
H02M3/07; (IPC1-7): H02M3/07
Attorney, Agent or Firm:
Mitsumasa Tokuwaka