Title:
CAPACITOR ARRANGEMENT
Document Type and Number:
Japanese Patent JP2021101462
Kind Code:
A
Abstract:
To provide a capacitor arrangement that allows a particularly good connection with a wiring board.SOLUTION: In a capacitor assembly 1 including at least one ceramic multilayer capacitor 2 having a plurality of ceramic layers and a first electrode and a second electrode arranged between the plurality of ceramic layers, and a pedestal 3, the pedestal 3 includes a substrate 9 and wiring paths 10a and 10b. The wiring paths 10a and 10b are led from the upper surface 11 of the substrate facing the multilayer capacitor 2 to the lower surface 12 of the substrate 2 facing away from the multilayer capacitor 2. The multilayer capacitor 2 is mechanically fixed to the pedestal 3. The first electrode and the second electrode are electrically connected to the wiring paths 10a and 10b.SELECTED DRAWING: Figure 1
Inventors:
JUERGEN KONRAD
MARKUS KOINI
FRANZ RINNER
MARKUS KOINI
FRANZ RINNER
Application Number:
JP2020193610A
Publication Date:
July 08, 2021
Filing Date:
November 20, 2020
Export Citation:
Assignee:
TDK ELECTRONICS AG
International Classes:
H01G2/06; H01G2/02; H01G4/30
Domestic Patent References:
| JP2014187322A | 2014-10-02 | |||
| JP2014192386A | 2014-10-06 | |||
| JP2014053588A | 2014-03-20 | |||
| JP2014179512A | 2014-09-25 | |||
| JPH0363922U | 1991-06-21 |
Foreign References:
| US20150122534A1 | 2015-05-07 |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Osamu Miyazaki
Tadahiko Ito
Osamu Miyazaki