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Title:
CODE ERROR DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH01316040
Kind Code:
A
Abstract:

PURPOSE: To attain the control without chattering by releasing a code error detection alarm signal outputted while number of error pulses reaches a prescribed number or over when a prescribed number or over of the state of error pulse 0 is consecutive.

CONSTITUTION: A detection protection circuit 13 outputs a code error detection pulse 5 when an overflow signal 3 is detected consecutively for N times. Furthermore, a release protection circuit 14 outputs a code error detection release pulse 6 when an error zero signal 4 is detected consecutively for M times. Pulses 5,6 are inputted respectively to a latch circuit 15 to output a code error alarm signal 7. The code error alarm sending probability P0 and the release probability P1 of the signal 7 according to the operation above are expressed in equations I, II since the error rate is distributed in the poisson distribution. A hysteresis is shown in the code error detection characteristic and the release characteristic from prescribed relation diagrams of both the equations, then the control is not in chattering operation by the code error alarm signal and smooth control is attained.


Inventors:
SHIYUYA MIKIJI
Application Number:
JP14918388A
Publication Date:
December 20, 1989
Filing Date:
June 15, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L1/00; (IPC1-7): H04L1/00
Domestic Patent References:
JPS6390236A1988-04-21
Attorney, Agent or Firm:
Naotaka Ide