COMPENASATING DEVICE FOR SYNCHRONIZING SIGNAL OMISSION

Title:

COMPENASATING DEVICE FOR SYNCHRONIZING SIGNAL OMISSION

Document Type and Number:

Japanese Patent JPS6376680

Kind Code:

A

Abstract:

PURPOSE:To output a synchronizing signal pulse even when the period of an input synchronizing signal is long by outputting the synchronizing signal pulse delayed by a certain period against the input synchronizing signal and deciding the timing of a pulse for compensation at the time of omitting the input synchronizing signal by the input synchronizing signal which is inputted just before. CONSTITUTION:The output pulse from a synchronizing signal detection circuit 1 is made to delay by a certain time in a pulse delay circuit 3 and adds to one of inputs of an OR circuit 4 and also adds to the reset terminal of a counter circuit 2. When the counter circuit 2 counts clocks to reach a set value, it outputs the pulse whose width is as same as that of the output of the pulse delay circuit 3. Therfore, when the omission occurs in the input synchronizing signals the counter circuit 2 outputs the pulse in the position where the pulse is outputted from the pulse delay circuit 3 in case of not omitting the synchronizing signal. The output from the counter circuit 2 and that from the pulse delay circuit 3 are composed in the OR circuit 4 and the synchronizing signal pulse where the omission is compensated can be obtained.

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