Title:
DATA CACHE CONTROL METHOD
Document Type and Number:
Japanese Patent JP3526160
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To accelerate the read/write of data between an external storage device and a host concerning a data cache control method.
SOLUTION: When a power source is turned on, according to information 8 of order to read the segments of cache memory stored in a non-volatile memory 5, the data of storage medium 4 are loaded from the non-volatile memory 5 to a cache memory 3 and when data instructed to be read from a host computer 2 are not existent in the cache memory 3, in the case of storing the information of order to read the relevant segment in the non-volatile memory 5 while defining these instructed data as the segment of high possibility to next read, the address range of segment 10 is collected and stored in the non-volatile memory 5 so as not to be overlapped when the data block of address overlapped with the segment exists in the plural segments of cache memory 3.
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Inventors:
Ozaki, Koji
Application Number:
JP2370097A
Publication Date:
May 10, 2004
Filing Date:
February 06, 1997
Export Citation:
Assignee:
FUJITSU LTD
FUJITSU SHUHENKI KK
FUJITSU SHUHENKI KK
International Classes:
G06F12/08; G06F3/06; (IPC1-7): G06F12/08; G06F3/06
Attorney, Agent or Firm:
岩田 茂