Title:
DC SELECTION CIRCUIT FOR FREQUENCY DIVIDER
Document Type and Number:
Japanese Patent JP2998650
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To conduct DC selection with high reliability by a simple circuit independently of component dispersion of a frequency divider to be tested and not employing a reference frequency divider.
SOLUTION: The output of an oscillator 1 is given to a clock generating circuit 2 and one output of the clock generating circuit 2 is given to a NAND circuit 5 via a frequency divider 3 to be tested and a frame generating circuit 4. The other output is directly given to the NAND circuit 5. The output of the NAND circuit 5 is counted by a binary counter 6 and its count is given to one input of a comparator 7. A reference value preset by a switch 8 is given to the other input of the comparator 7. The comparator 7 compares the respective inputs and provides an output of L(H) when they are equal to each other and provides an output of H(L) when not equal. The DC output 9 of the comparator 7 is used to discriminate the acceptance of the operation of the frequency divider to be tested by connecting the output 9 to a DC selection tester.
More Like This:
Inventors:
Hidehiko Kuroda
Application Number:
JP21878296A
Publication Date:
January 11, 2000
Filing Date:
August 20, 1996
Export Citation:
Assignee:
NEC
International Classes:
H03K21/40; G01R31/30; (IPC1-7): H03K21/40
Domestic Patent References:
| JP60169222A | ||||
| JP7218603A |
Attorney, Agent or Firm:
Naka Kanno