Title:
DELTA SIGMA MODULATION DEVICE AND ITS METHOD AND DIGITAL SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JP3870575
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide delta sigma modulation device/method modulating the digital signal of plural m-bits into one bit digital signal while signal deterioration is suppressed owing to the round-off of data in a local feed back loop and to provide a digital signal processor.
SOLUTION: The local feedback attenuator 38 of a local feed back loop part 44 attenuates integral output from a third integrator 33 and supplies it to a noise shaper 39. The noise shaper 39 is provided with an adder 40, a shift computing element 41, an adder 42 and a multi-bit quantizer 43. Attenuation output from the local feedback attenuator 38 is requantized without rounding off data word length. To put it concretely, a requantization error is shifted to a part outside an audible band.
Inventors:
Masayoshi Noguchi
Moto Ichimura
Moto Ichimura
Application Number:
JP24390798A
Publication Date:
January 17, 2007
Filing Date:
August 28, 1998
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H03M7/32; (IPC1-7): H03M7/32
Domestic Patent References:
| JP9307452A | ||||
| JP9266447A | ||||
| JP10039886A |
Foreign References:
| WO1996041422A1 |
Attorney, Agent or Firm:
Akira Koike
Eiichi Tamura
Seiji Iga
Eiichi Tamura
Seiji Iga