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Title:
DIELECTRIC-ISOLATION SUBSTRATE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3488927
Kind Code:
B2
Abstract:

PURPOSE: To form a dielectric-isolation substrate, where complete supporter- wafer junction is accomplished, by forming an oxide film between a second semiconductor polycrystalline silicon layer and a supporter, in a dielectric- isolation substrate of junction structure.
CONSTITUTION: An isolation groove 6 is dug to form a region to become a single crystal island by performing anisotropic etching, with an SiO2 film, made by oxidizing the single crystalline wafer 301 of silicon, as a mask. After removal of the SiO2 film, it is oxidized again to form an SiO2 film for insulation. Next, polycrystalline silicon 601 is formed until the isolation groove is stopped, and then it is polished to be flat. Next, a polycrystalline silicon film 7 is formed on the surface of the polycrystalline silicon layer 601, and then it is polished to remove irregularity. Next, a single crystalline silicon wafer, where an SiO2 film 8 is formed on the surface of a supporter 5, is prepared, and it is joined to the polycrystalline silicon layer 7 face, and then a needless section is removed, and a single crystal isolation island 3 is formed to complete a dielectric- isolation substrate 1. The irregularity of the second polycrystalline silicon layer 7 is eliminated by the SiO2 layer 8, and the supporter and the wafer can be joined firmly to each other.


Inventors:
Hironori Inoue
Yoshitaka Sugawara
Shinichi Kurita
Yuichi Saito
Application Number:
JP29596292A
Publication Date:
January 19, 2004
Filing Date:
November 05, 1992
Export Citation:
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Assignee:
株式会社日立製作所
三菱住友シリコン株式会社
International Classes:
H01L21/762; H01L21/02; H01L21/304; H01L21/76; H01L27/12; (IPC1-7): H01L21/762; H01L21/304
Domestic Patent References:
JP3265153A
JP6362252A
Attorney, Agent or Firm:
Tatsuyuki Unuma