To reduce the memory capacity, to easily design a large scale integration circuit for the device and to reduce the cost by entering a small number of adjustment points so as to set lots of correction points through arithmetic operation and generating correction data for each horizontal scanning.

A horizontal scanning position in the vertical direction is detected based on a current of a vertical deflection yoke 12 in the adjustment process. Thus, as to at least two adjustment point positions in the vertical direction, image adjustment data for each correction item with respect to the horizontal scanning are entered. An interpolation arithmetic circuit 29 calculates adjustment data for remaining image adjustment points and the data are stored in an erasure/rewritable read only EEPROM 27. Furthermore, the adjustment data are also stored in a DRAM 28. Even when number of the adjustment points is small, since lots of correction points are set, the memory capacity is reduced and since correction data are generated for each horizontal scanning, the device is easily formed to be a large scale integration circuit and the cost is reduced.