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Patent Searching and Data


Title:
VIDEO SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JPH09284588
Kind Code:
A
Abstract:

To compress superimposed characters of plural lines into the optimum size and position and to display an easy-to see superimposed character image by performing the compression processing in order to lower the compression level of the superimposed character signal in a superimposed character compression period in comparison with a blakish period.

A pattern detection circuit 13 detects the patterns of the video signals and the synchronizing signals sent from a synchronous processing circuit 12 and outputs the pattern start/end phase value and the number of line. A superimposed character detection circuit 14 detects the superimposed character and outputs the superimposed character start/end phase value and the number of lines. A superimposed character compression control signal generation circuit 30 applies the arithmetic processing to the phase value and the numbers of lines which are acquired from both circuits 13 and 14 and generates the superimposed character compression control signals of different levels in a superimposed character area period including a blakish part in response to the blakish part and a superimposed character period. A video compression processing circuit 31 performs the video compression processing in the superimposed character area period including the blakish part based on the superimposed character compression control signal. Thus, the superimposed character compression processing can be performed to display a superimposed character in an optimum size and at an optimum position even if a superimposed character of plural lines is inserted with a large blakish part.


Inventors:
FUJISHIMA YUKITOMI
Application Number:
JP9122396A
Publication Date:
October 31, 1997
Filing Date:
April 12, 1996
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H04N3/223; H04N5/445; (IPC1-7): H04N3/223; H04N5/445
Attorney, Agent or Firm:
伊藤 進