PURPOSE: To maintain the high probability that a code error arises within the bit in the same word and to enhance error correction processing efficiency even if such code error arises by processing all the bits of the same word by the same processing system.

CONSTITUTION: The 8-9 conversion recording code of a 9-bit parallel system which is the output of a recording encoding circuit 2 is inputted as the recording code of a bit unit interleave system of a serial signal system into a recording circuit 3 by a bit unit interleave circuit 8. The code is subjected to precoder processing for the purpose of application of a PR4 detection system and is transmitted to a recording and reproducing system 4. The reproduced signal is subjected to sampling and equalizing processing in a reproducing circuit 5 and is converted to the two serial type digital signals. The two signals are converted to the 9-bit parallel interleave type recording codes by a decoding circuit 9 dealing with the interleave. The transfer rate is doubled and the data is converted to 8-bit data by one system of the reproduced signal code and is inputted to an error correction circuit 7, by which the processing meeting the presence or absence of the error is executed.