Title:
DRIVING CIRCUIT AND DRIVING METHOD FOR CAPACITIVE LOAD
Document Type and Number:
Japanese Patent JP3722812
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce electric power consumption in a driving circuit for applying voltage to a capacitive load while periodically inverting its polarity.
SOLUTION: The video signal line driving circuit is provided with a unit precharging circuit 51 consisting of a capacitor Cpr and switches SWA 1, SWA 2, SWB 1, and SWB 1 for connecting the capacitor Cpr in parallel to the capacitive load of a liquid crystal panel per each output terminal TSi. An OFF period when output buffers 41p and 41n are electrically disconnected from the video signal line is disposed between a P period when a positive voltage is required to be applied from the output buffer 41p to the video signal line (the capacitive load) and an N period when the negative voltage is required to be applied from the output buffer 41n thereto. First and second precharging periods are set within the OFF period. The capacitor Cpr is connected in parallel to the capacitive load of the liquid crystal panel in the first precharging period and is connected in parallel to the capacitive load in the direction reverse from the case of the first precharging period T1pr in the second precharginng period.
Inventors:
Ken Inada
Application Number:
JP2003193775A
Publication Date:
November 30, 2005
Filing Date:
July 08, 2003
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G02F1/133; G09G3/20; G09G3/36; H03K17/51; (IPC1-7): G09G3/36; G02F1/133; G09G3/20
Domestic Patent References:
| JP9504389A | ||||
| JP2001022329A | ||||
| JP2002149128A | ||||
| JP8234706A | ||||
| JP2001051663A | ||||
| JP2001134249A |
Attorney, Agent or Firm:
Akihiro Shimada