PURPOSE: To eliminate the need for a large phase margin by connecting a timing extraction circuit to the output terminal of a selector so as to avoid rapid fluctuation in the phase of an output clock signal.

CONSTITUTION: A timing extraction circuit 10 connected to the output terminal of a selector 9 consists of a narrow band pass filter whose center frequency is, e.g. set to the frequency of a clock signal. Then even when the input phase of the clock signal is changed by 180° stepwise at a point B, the output phase is changed continuously by 180°. Suppose that the clocks 1, 2 have the phase difference of 180° being the worst phase difference, when a control signal is inputted to a selector control input terminal 102 at a point B, the selector output acts on selecting the clock 2 from the clock 1 and the clock signal having the phase discontinuity of 180° at the point B. However, the timing extraction circuit 10 sends an output clock signal whose phase is continuously fluctuated from the point B according to the input output characteristic to an output terminal 103. Thus, no large phase margin is required and the malfunction at the switching is reduced.