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Patent Searching and Data


Title:
EMULATOR DEVICE FOR MICROPROCESSOR
Document Type and Number:
Japanese Patent JPS62290940
Kind Code:
A
Abstract:

PURPOSE: To prevent occurrence of a latch-up phenomenon of an input buffer having a CMOS structure of the communication part of a development subject device, by setting a signal line set between an emulator device and the information communication part of the development subject device under an unconnection state when the main current of the development subject device is turned off and then in a connection state when said current is turned on.

CONSTITUTION: A main power supply state detecting part 6 of a development subject device 2 detects the ON/OFF states of the power supply of the subject device 2. When said power supply is set in an ON state, an active signal is outputted to a signal line control part 5 set between an information communication part 3 of an emulator device 1 for microprocessor and an information communication part 4 of the device 2 via a control part 7. Thus a signal line 8 is activated and therefore an input buffer of the part 4 never produces a latch-up phenomenon. While an inactive signal is applied to the part 5 if the power supply of the device 2 is set under an OFF state. Thus the line 8 has a high impedance and therefore the latch-up phenomenon is avoided for the input buffer of the part 4.


Inventors:
TAKAGI HIDEO
Application Number:
JP13463086A
Publication Date:
December 17, 1987
Filing Date:
June 09, 1986
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
G06F11/22; (IPC1-7): G06F11/22
Attorney, Agent or Firm:
Uchihara Shin