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Patent Searching and Data


Title:
ENCODER AND DECODER
Document Type and Number:
Japanese Patent JP2002027464
Kind Code:
A
Abstract:

To provide an encoder and a decoder which improve an error propagation suppression and ECC correction ability while avoiding increase in circuit size.

The encoder includes a means for branching an RLL code into a restraining part corresponding to a basic code and a non-restraining part corresponding to an information bit itself, a first encoder means for adding an error correction code to the restraining part for RLL encoding, a second encoder means for adding an error correction code to the non-restraining part, and an interleave means for interleaving outputs of the first and second encoder means to output encoded information.


Inventors:
SHIMODA KANEYASU
Application Number:
JP2000207448A
Publication Date:
January 25, 2002
Filing Date:
July 07, 2000
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04N19/00; G11B20/10; G11B20/18; H03M5/14; H03M7/14; H03M13/00; H03M13/27; H04N19/42; H04N19/423; H04N19/65; H04N19/88; H04N19/89; H04N19/93; (IPC1-7): H04N7/24; G11B20/10; G11B20/18; H03M7/14; H03M13/27
Attorney, Agent or Firm:
Tadahiko Ito