PURPOSE: To detect a bit error with simple circuit constitution by providing 1st, 2nd error detection means outputting an error pulse, a means controlling the operation of the error detection means and a circuit ORing 1st and 2nd error pulses and outputting an error signal.

CONSTITUTION: First and 2nd error detection means 24, 26 detecting a signal error resulting from 2-bit disparity signals from an input means 23 is detected S1, S2 not in compliance with the 5B6B code rule and outputting 1st and 2nd error pulses 32, 33, and a control means 2K for the operation of the 1st error detection means 24 are provided to the error detection circuit. The 1st and 2nd error pulses 32, 33 are ORed by an OR gate 20 and an error pulse is generated from an output Q of a flip-flop 21.