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Patent Searching and Data


Title:
ERROR PROCESSING SYSTEM OF INFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JPS5985548
Kind Code:
A
Abstract:

PURPOSE: To simplify a system constitution and to eliminate a delay time by transmitting a corrected data to a requester when an error detecting circuit detects an error and at the same time correcting the data of a buffer storage with the address of the error data.

CONSTITUTION: The type of request given from a requester, an address, etc. are applied to a selecting circuit 1 from terminals A and B. Then the information selected by the circuit 1 is stored in an address register 2. The data of a buffer storage 6 is read out by the address and stored in a buffer storage register 7. In this case, the address of the register 2 is copied and held at an address register 3. At the same time, the data stored in the register 7 is transmitted to the requester from a terminal D as well as to an ECC circuit 8 which detects errors. When an error is detected, an error signal is transmitted to the requester. At the same time, the data of the storage 6 is corrected. Thus the constitution is simplified for an error processing system.


Inventors:
HARA KAZUHIRO
Application Number:
JP19552782A
Publication Date:
May 17, 1984
Filing Date:
November 08, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/10; G06F12/08; G06F12/16; (IPC1-7): G06F11/08; G06F13/00; G11C9/06
Attorney, Agent or Firm:
Koshiro Matsuoka