PURPOSE: To expand a trigger pulse to a pulse of one frame width even if the trigger pulse is inputted succeedingly between one frame time and between the succeeding frame time by giving a pulse being the inversion of a frame pulse with one bit width by a NOT circuit to a clear terminal of a latch circuit so as to clear the latch circuit.

CONSTITUTION: With a trigger pulse B inputted to a latch terminal of the latch circuit 1 employing two NAND circuits, the pulse is latched as a level 1 as shown in figure D, the latch circuit is cleared while a pulse C being the inversion of a frame pulse A with one bit width at a NOT circuit 2 is given to a clear terminal for one bit width and reaches 0 level as shown in the figure D. The pulse shown in the figure D is given to an FF 3 and when the FF 3 is triggered by a frame pulse A given to a clock terminal of the FF 3, a pulse E expanding each trigger pulse B into one frame width is outputted. Thus, even if the trigger pulse is inputted for the succeeding frame again, it can be expanded into one frame width.