Title:
FLIP CHIP PACKAGING CIRCUIT BOARD AND ITS MANUFACTURING METHOD, AND INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JP2005109187
Kind Code:
A
Abstract:
To provide a flip chip packaging circuit board capable of preventing a short circuit between adjacent bumps and realizing a satisfactory contact between the bumps and electrodes of the element at the time of the packaging, and its manufacturing method, and to provide an integrated circuit device.
Solder resists 16 are provided between adjacent bumps 22. The solder resists 16 are formed away from the bumps 22 at the predetermined distance, and openings 16a surrounding away the bumps 22 are patterned in the solder resist 16. A distance between the bumps 22 and the solder resists 16 is set on the basis of a mask overlay accuracy of the patterning.
Inventors:
KANEYUKI TOMOHIKO
Application Number:
JP2003341309A
Publication Date:
April 21, 2005
Filing Date:
September 30, 2003
Export Citation:
Assignee:
TDK CORP
International Classes:
H01L21/60; H01L21/56; H01L23/12; H01L23/498; H05K1/18; H05K3/34; H05K5/00; H01R13/52; (IPC1-7): H01L21/60
Attorney, Agent or Firm:
Kimura Mitsuru
Takanori Mamoru
Takanori Mamoru