PURPOSE: To provide a frame detection circuit for evading a defect which is the increase of erroneous synchornization even in a system using a TDMA system for transmitting signals in cyclically allocated discontinuous time slots.

CONSTITUTION: In a data transmission system for constituting a transmission frame by cyclically inserting a pilot symbol between data symbol strings and transmitting data by a frame unit, this frame detection circuit of a receiver detects a frame timing by a synchronous addition system. Whether or not the input of the frame detection circuit is zero is detected by a detector 11 and detected information is inputted to a control circuit 12. Then, when the input of the frame detection circuit is zero, a storage circuit 6 is controlled so as to hold the storage contents of the storage circuit for frame detection.